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[2001:1868:205::9]) by mx.google.com with ESMTPS id qz5si13108120pab.28.2014.10.14.06.09.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Oct 2014 06:09:16 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xe1p2-0004Ih-07; Tue, 14 Oct 2014 13:07:28 +0000 Received: from mail-wg0-f42.google.com ([74.125.82.42]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xe1mx-0002An-IQ for linux-arm-kernel@lists.infradead.org; Tue, 14 Oct 2014 13:05:20 +0000 Received: by mail-wg0-f42.google.com with SMTP id z12so10721216wgg.13 for ; Tue, 14 Oct 2014 06:04:57 -0700 (PDT) X-Received: by 10.180.206.171 with SMTP id lp11mr4614269wic.33.1413291897743; Tue, 14 Oct 2014 06:04:57 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id hg14sm170558wib.24.2014.10.14.06.04.56 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Oct 2014 06:04:57 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 6/8] ARM: realview: add FPGA UART4 to PB1176 DTS Date: Tue, 14 Oct 2014 15:04:13 +0200 Message-Id: <1413291855-499-6-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1413291855-499-1-git-send-email-linus.walleij@linaro.org> References: <1413291855-499-1-git-send-email-linus.walleij@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141014_060519_792763_A3F19CED X-CRM114-Status: GOOD ( 11.85 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.42 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [74.125.82.42 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Linus Walleij X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This adds the UART4 found on the FPGA to the PB1176 DTS file. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/arm-realview-pb1176.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts index 313a71756a18..ac4c1c850db2 100644 --- a/arch/arm/boot/dts/arm-realview-pb1176.dts +++ b/arch/arm/boot/dts/arm-realview-pb1176.dts @@ -35,6 +35,7 @@ serial1 = &pb1176_serial1; serial2 = &pb1176_serial2; serial3 = &pb1176_serial3; + serial4 = &fpga_serial; }; memory { @@ -288,6 +289,15 @@ clock-names = "apb_pclk"; }; + fpga_serial: serial@10009000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x10009000 0x1000>; + interrupt-parent = <&intc_fpga1176>; + interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uartclk>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; + }; + /* This GIC on the board is cascaded off the DevChip GIC */ intc_fpga1176: interrupt-controller@10040000 { compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic"; @@ -334,5 +344,7 @@ clocks = <&pclk>; clock-names = "apb_pclk"; }; + + }; };