From patchwork Wed Oct 8 05:27:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Scott Branden X-Patchwork-Id: 38449 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f199.google.com (mail-wi0-f199.google.com [209.85.212.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 50DB6202E7 for ; Wed, 8 Oct 2014 05:28:34 +0000 (UTC) Received: by mail-wi0-f199.google.com with SMTP id d1sf3623015wiv.6 for ; Tue, 07 Oct 2014 22:28:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type :content-transfer-encoding; bh=3Oepm6vANaTet/bBkiE/UcR27bAwOYNjBqw99NKZqT4=; b=TrGXfIa/42v+bPZyvb6XeBpV1epjGPgpzieTJbLWiKHOLG9NQBNJRi9CW9GEPXnokR gLSRgFsN3Lzj6m2TnjUWftRTMh/FAOyaHGXyaGvYxDEHyYurcxEAhHn/wTRJ1049lIT+ 6usXVuMZmeF3m/8dMjryGFSZdJOaitbx26wZ76bD+ACVYsDzNfDs0OmIlpyN1umUxP7n L+xcmr7BkOXy+rKK1UeR0lKOshdBziqvCJksDXF0e2DmeqkYNRx1/emMGn1gie+JdNeA lykeKKZlTEV9rKN1HeXp6yPooChmZVx6NS7Pwvr8So5TFxOliWLRRCWyTHX7XBJYMjdy qVjw== X-Gm-Message-State: ALoCoQn1r5kt6WPjgG5lrnKMLeR3JHgQDROHfAGYBw8HGuHfVlIFLV5EPYotXdeblLStLNcfXe4u X-Received: by 10.194.100.3 with SMTP id eu3mr48301wjb.6.1412746113439; Tue, 07 Oct 2014 22:28:33 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.6.39 with SMTP id x7ls19759lax.31.gmail; Tue, 07 Oct 2014 22:28:32 -0700 (PDT) X-Received: by 10.152.10.2 with SMTP id e2mr686862lab.96.1412746112788; Tue, 07 Oct 2014 22:28:32 -0700 (PDT) Received: from mail-la0-f41.google.com (mail-la0-f41.google.com [209.85.215.41]) by mx.google.com with ESMTPS id wv8si27710957lac.86.2014.10.07.22.28.32 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 07 Oct 2014 22:28:32 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) client-ip=209.85.215.41; Received: by mail-la0-f41.google.com with SMTP id pn19so7808176lab.28 for ; Tue, 07 Oct 2014 22:28:32 -0700 (PDT) X-Received: by 10.152.204.231 with SMTP id lb7mr8674114lac.44.1412746112696; Tue, 07 Oct 2014 22:28:32 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp3833lbz; Tue, 7 Oct 2014 22:28:31 -0700 (PDT) X-Received: by 10.70.88.78 with SMTP id be14mr1165021pdb.152.1412746110360; Tue, 07 Oct 2014 22:28:30 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id uv1si17253797pac.199.2014.10.07.22.28.29 for ; Tue, 07 Oct 2014 22:28:30 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754618AbaJHF1t (ORCPT + 27 others); Wed, 8 Oct 2014 01:27:49 -0400 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:57249 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752656AbaJHF1n (ORCPT ); Wed, 8 Oct 2014 01:27:43 -0400 X-IronPort-AV: E=Sophos;i="5.04,675,1406617200"; d="scan'208";a="47678156" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 07 Oct 2014 22:48:17 -0700 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Tue, 7 Oct 2014 22:27:50 -0700 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.174.1; Tue, 7 Oct 2014 22:27:50 -0700 Received: from mail.broadcom.com (lbrmn-lnxub113.ric.broadcom.com [10.136.13.65]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 2FCC740FE6; Tue, 7 Oct 2014 22:27:34 -0700 (PDT) From: Scott Branden To: Christian Daudt , Matt Porter , Russell King , , Mike Turquette , Alex Elder , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , "Kumar Gala" , Andrew Morton , "David S. Miller" , Greg Kroah-Hartman , Joe Perches , "Mauro Carvalho Chehab" , Antti Palosaari CC: JD Zheng , Ray Jui , , , , Jonathan Richardson , Scott Branden Subject: [PATCH 1/6] ARM: cygnus: Initial support for Broadcom Cygnus SoC Date: Tue, 7 Oct 2014 22:27:00 -0700 Message-ID: <1412746025-11998-2-git-send-email-sbranden@broadcom.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1412746025-11998-1-git-send-email-sbranden@broadcom.com> References: <1412746025-11998-1-git-send-email-sbranden@broadcom.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: sbranden@broadcom.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jonathan Richardson Adds initial support for the Cygnus SoC based on Broadcom’s iProc series. Reviewed-by: Ray Jui Reviewed-by: Desmond Liu Reviewed-by: JD (Jiandong) Zheng Tested-by: Jonathan Richardson Signed-off-by: Scott Branden --- arch/arm/mach-bcm/Kconfig | 31 ++++++++ arch/arm/mach-bcm/Makefile | 3 + arch/arm/mach-bcm/bcm_cygnus.c | 166 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 200 insertions(+) create mode 100644 arch/arm/mach-bcm/bcm_cygnus.c diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index fc93800..2dd3f78 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -5,6 +5,37 @@ menuconfig ARCH_BCM if ARCH_BCM +config ARCH_BCM_IPROC + bool "Broadcom ARMv7 iProc boards" if ARCH_MULTI_V7 + select ARM_GIC + select CACHE_L2X0 + select HAVE_ARM_TWD if LOCAL_TIMERS + select HAVE_CLK + select CLKSRC_OF + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select ARM_GLOBAL_TIMER + select ARCH_REQUIRE_GPIOLIB + select ARM_AMBA + select PINCTRL + select DEBUG_UART_8250 + help + This enables support for systems based on Broadcom IPROC architected SoCs. + The IPROC complex contains one or more ARM CPUs along with common + core periperals. Application specific SoCs are created by adding a + uArchitecture containing peripherals outside of the IPROC complex. + Currently supported SoCs are Cygnus. + +menu "iProc SoC based Machine types" + depends on ARCH_BCM_IPROC + + config ARCH_BCM_CYGNUS + bool "Support Broadcom Cygnus board" + select USB_ARCH_HAS_EHCI if USB_SUPPORT + help + Support for Broadcom Cygnus SoC. +endmenu + config ARCH_BCM_MOBILE bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7 select ARCH_REQUIRE_GPIOLIB diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile index b19a396..46e092a 100644 --- a/arch/arm/mach-bcm/Makefile +++ b/arch/arm/mach-bcm/Makefile @@ -10,6 +10,9 @@ # of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. +# Cygnus +obj-$(CONFIG_ARCH_BCM_CYGNUS) += bcm_cygnus.o + # BCM281XX obj-$(CONFIG_ARCH_BCM_281XX) += board_bcm281xx.o diff --git a/arch/arm/mach-bcm/bcm_cygnus.c b/arch/arm/mach-bcm/bcm_cygnus.c new file mode 100644 index 0000000..8e430ed --- /dev/null +++ b/arch/arm/mach-bcm/bcm_cygnus.c @@ -0,0 +1,166 @@ +/* + * Copyright 2014 Broadcom Corporation. All rights reserved. + * + * Unless you and Broadcom execute a separate written software license + * agreement governing use of this software, this software is licensed to you + * under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CRMU_MAIL_BOX1 0x03024028 +#define CRMU_SOFT_RESET_CMD 0xFFFFFFFF + +/* CRU_RESET register */ +static void * __iomem crmu_mail_box1_reg; + +#ifdef CONFIG_NEON + +#define CRU_BASE 0x1800e000 +#define CRU_SIZE 0x34 +#define CRU_CONTROL_OFFSET 0x0 +#define CRU_PWRDWN_EN_OFFSET 0x4 +#define CRU_PWRDWN_STATUS_OFFSET 0x8 +#define CRU_NEON0_HW_RESET 6 +#define CRU_CLAMP_ON_NEON0 20 +#define CRU_PWRONIN_NEON0 21 +#define CRU_PWRONOUT_NEON0 21 +#define CRU_PWROKIN_NEON0 22 +#define CRU_PWROKOUT_NEON0 22 +#define CRU_STATUS_DELAY_NS 500 +#define CRU_MAX_RETRY_COUNT 10 +#define CRU_RETRY_INTVL_US 1 + +/* Power up the NEON/VFPv3 block. */ +static void bcm_cygnus_powerup_neon(void) +{ + void * __iomem cru_base = ioremap(CRU_BASE, CRU_SIZE); + u32 reg, i; + + if (WARN_ON(!cru_base)) + return; + + /* De-assert the neon hardware block reset */ + reg = readl(cru_base + CRU_CONTROL_OFFSET); + reg &= ~(1 << CRU_NEON0_HW_RESET); + writel(reg, cru_base + CRU_CONTROL_OFFSET); + + /* Assert the power ON register bit */ + reg = readl(cru_base + CRU_PWRDWN_EN_OFFSET); + reg |= (1 << CRU_PWRONIN_NEON0); + writel(reg, cru_base + CRU_PWRDWN_EN_OFFSET); + + /* + * Wait up to 10 usec in 1 usec increments for the + * status register to acknowledge the power ON assert + */ + for (i = 0; i < CRU_MAX_RETRY_COUNT; i++) { + reg = readl(cru_base + CRU_PWRDWN_STATUS_OFFSET); + if (reg & CRU_PWRONOUT_NEON0) + break; + + udelay(CRU_RETRY_INTVL_US); + } + + if (WARN_ON(i == CRU_MAX_RETRY_COUNT)) + goto neon_unmap; + + /* Wait 0.5 usec = 500 nsec */ + ndelay(CRU_STATUS_DELAY_NS); + + /* Assert the power OK register bit */ + reg = readl(cru_base + CRU_PWRDWN_EN_OFFSET); + reg |= (1 << CRU_PWROKIN_NEON0); + writel(reg, cru_base + CRU_PWRDWN_EN_OFFSET); + + /* + * Wait up to 10 usec in 1 usec increments for the + * status register to acknowledge the power OK assert + */ + for (i = 0; i < CRU_MAX_RETRY_COUNT; i++) { + reg = readl(cru_base + CRU_PWRDWN_STATUS_OFFSET); + if (reg & CRU_PWROKOUT_NEON0) + break; + + udelay(CRU_RETRY_INTVL_US); + } + + if (WARN_ON(i == CRU_MAX_RETRY_COUNT)) + goto neon_unmap; + + /* Wait 0.5 usec = 500 nsec */ + ndelay(CRU_STATUS_DELAY_NS); + + /* Set the logic clamp for the neon block */ + reg = readl(cru_base + CRU_PWRDWN_EN_OFFSET); + reg &= ~(1 << CRU_CLAMP_ON_NEON0); + writel(reg, cru_base + CRU_PWRDWN_EN_OFFSET); + + /* Wait 0.5 usec = 500 nsec */ + ndelay(CRU_STATUS_DELAY_NS); + + /* Reset the neon hardware block */ + reg = readl(cru_base + CRU_CONTROL_OFFSET); + reg |= (1 << CRU_NEON0_HW_RESET); + writel(reg, cru_base + CRU_CONTROL_OFFSET); + +neon_unmap: + iounmap(cru_base); +} +#endif /* CONFIG_NEON */ + +static void __init bcm_cygnus_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + l2x0_of_init(0, ~0UL); + + crmu_mail_box1_reg = ioremap(CRMU_MAIL_BOX1, SZ_4); + WARN_ON(!crmu_mail_box1_reg); + +#ifdef CONFIG_NEON + bcm_cygnus_powerup_neon(); +#endif +} + +/* + * Reset the system + */ +void bcm_cygnus_restart(enum reboot_mode mode, const char *cmd) +{ + /* Send reset command to M0 via Mailbox. */ + if (crmu_mail_box1_reg) { + writel(CRMU_SOFT_RESET_CMD, crmu_mail_box1_reg); + iounmap(crmu_mail_box1_reg); + } + + /* Wait for M0 to reset the chip. */ + while (1) + cpu_do_idle(); +} + +static const char const *bcm_cygnus_dt_compat[] = { + "brcm,cygnus", + NULL, +}; + +DT_MACHINE_START(BCM_CYGNUS_DT, "Broadcom Cygnus SoC") + .init_machine = bcm_cygnus_init, + .map_io = debug_ll_io_init, + .dt_compat = bcm_cygnus_dt_compat, + .restart = bcm_cygnus_restart +MACHINE_END