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[2001:1868:205::9]) by mx.google.com with ESMTPS id go2si5427925pbb.31.2014.09.29.01.06.14 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Sep 2014 01:06:15 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XYVx0-0008O5-P1; Mon, 29 Sep 2014 08:04:54 +0000 Received: from mail-pd0-f175.google.com ([209.85.192.175]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XYVwo-0008Dw-KE for linux-arm-kernel@lists.infradead.org; Mon, 29 Sep 2014 08:04:43 +0000 Received: by mail-pd0-f175.google.com with SMTP id v10so15446415pde.20 for ; Mon, 29 Sep 2014 01:04:21 -0700 (PDT) X-Received: by 10.66.244.132 with SMTP id xg4mr58791056pac.64.1411977861776; Mon, 29 Sep 2014 01:04:21 -0700 (PDT) Received: from kamensky-w530.hsd1.ca.comcast.net ([24.6.79.41]) by mx.google.com with ESMTPSA id x3sm11561675pdp.53.2014.09.29.01.04.19 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Sep 2014 01:04:20 -0700 (PDT) From: Victor Kamensky To: will.deacon@arm.com, mark.rutland@arm.com, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: ptrace: hw_break_set take into account hardware breakpoints number Date: Mon, 29 Sep 2014 01:04:02 -0700 Message-Id: <1411977842-16515-2-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1411977842-16515-1-git-send-email-victor.kamensky@linaro.org> References: <1411977842-16515-1-git-send-email-victor.kamensky@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140929_010442_681381_DB769979 X-CRM114-Status: GOOD ( 15.11 ) X-Spam-Score: -0.8 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.192.175 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.1 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.192.175 listed in wl.mailspike.net] Cc: Matthew.Leach@arm.com, Victor Kamensky , ard.biesheuvel@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: victor.kamensky@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 hw_break_set function that performs ptrace_regset for hardware breakpoints and watchpoints needs to take into account actual number of hardware breakpoints and watchpoints available in CPU. Current code iterates over all 16 entries of 'struct user_hwdebug_state' and tries to reserve hardware breakpoint for each index, which fails if CPU supports less than 16 hardware breakpoints. One manifestation of the issue is that gdb fails to debug multithreaded user land application and exits with 'Unexpected error setting hardware debug registers' error - ptrace system call for hardware breakpoints regset fails with ENOSPC. Solution is to read number of available hardware breakpoints and watchpoints available in CPU and process only that number of first entries in passed 'struct user_hwdebug_state' regset. Code assumes that ptrace caller uses only first entries in 'struct user_hwdebug_state' up to number of hardware breakpoints and watchpoints supported by CPU. I.e there are no "ignore me, empty" entries in the middle of 'struct user_hwdebug_state' entries array. Signed-off-by: Victor Kamensky --- arch/arm64/kernel/ptrace.c | 29 ++++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index fe63ac5..4178ba1 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -248,22 +248,32 @@ static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type, return 0; } -static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info) +static int ptrace_hbp_get_num_slots(unsigned int note_type, u8 *num) { - u8 num; - u32 reg = 0; - switch (note_type) { case NT_ARM_HW_BREAK: - num = hw_breakpoint_slots(TYPE_INST); + *num = hw_breakpoint_slots(TYPE_INST); break; case NT_ARM_HW_WATCH: - num = hw_breakpoint_slots(TYPE_DATA); + *num = hw_breakpoint_slots(TYPE_DATA); break; default: return -EINVAL; } + return 0; +} + +static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info) +{ + u8 num; + u32 reg = 0; + int err; + + err = ptrace_hbp_get_num_slots(note_type, &num); + if (err) + return err; + reg |= debug_monitors_arch(); reg <<= 8; reg |= num; @@ -432,6 +442,11 @@ static int hw_break_set(struct task_struct *target, int ret, idx = 0, offset, limit; u32 ctrl; u64 addr; + u8 num_slots; + + ret = ptrace_hbp_get_num_slots(note_type, &num_slots); + if (ret) + return ret; /* Resource info and pad */ offset = offsetof(struct user_hwdebug_state, dbg_regs); @@ -441,7 +456,7 @@ static int hw_break_set(struct task_struct *target, /* (address, ctrl) registers */ limit = regset->n * regset->size; - while (count && offset < limit) { + while ((count && offset < limit) && (idx < num_slots)) { ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr, offset, offset + PTRACE_HBP_ADDR_SZ); if (ret)