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[209.132.180.67]) by mx.google.com with ESMTP id sj3si16854452pab.32.2014.09.27.21.23.09 for ; Sat, 27 Sep 2014 21:23:10 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750784AbaI1EXJ (ORCPT + 5 others); Sun, 28 Sep 2014 00:23:09 -0400 Received: from mail-pa0-f47.google.com ([209.85.220.47]:50223 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750765AbaI1EXI (ORCPT ); Sun, 28 Sep 2014 00:23:08 -0400 Received: by mail-pa0-f47.google.com with SMTP id rd3so5031141pab.34 for ; Sat, 27 Sep 2014 21:23:08 -0700 (PDT) X-Received: by 10.66.140.76 with SMTP id re12mr26302108pab.141.1411878188080; Sat, 27 Sep 2014 21:23:08 -0700 (PDT) Received: from localhost.localdomain ([60.168.114.151]) by mx.google.com with ESMTPSA id kk7sm8835695pab.31.2014.09.27.21.22.56 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 27 Sep 2014 21:23:07 -0700 (PDT) From: Zhangfei Gao To: Wolfram Sang , Arnd Bergmann , haifeng.yan@linaro.org, jchxue@gmail.com, xuwei5@hisilicon.com Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, Wei Yan , Zhangfei Gao Subject: [PATCH v2 1/3] i2c: hix5hd2: add devicetree documentation Date: Sun, 28 Sep 2014 12:22:07 +0800 Message-Id: <1411878129-19743-2-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1411878129-19743-1-git-send-email-zhangfei.gao@linaro.org> References: <1411878129-19743-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Wei Yan Signed-off-by: Wei Yan Signed-off-by: Zhangfei Gao --- .../devicetree/bindings/i2c/i2c-hix5hd2.txt | 31 ++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt diff --git a/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt b/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt new file mode 100644 index 0000000..981a069 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt @@ -0,0 +1,31 @@ +I2C for Hisilicon hix5hd2 chipset platforms (3716,3719,3798...) + +Required properties: +- compatible: Must be "hisilicon,hix5hd2-i2c" + Specifically, the following versions of the chipset are supported: + Hi3716CV200 (support six I2C module) + Hi3719CV100 (support six I2C module) + Hi3718CV100 (support six I2C module) + Hi3719MV100 (support two I2C module) + Hi3718MV100 (support two I2C module) +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: interrupt number to the cpu. +- #address-cells = <1>; +- #size-cells = <0>; +- clocks: phandles to input clocks. + +Optional properties: +- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000 +- Child nodes conforming to i2c bus binding + +Examples: +I2C0@f8b10000 { + compatible = "hisilicon,hix5hd2-i2c"; + reg = <0xf8b10000 0x1000>; + interrupts = <0 38 4>; + clocks = <&clock HIX5HD2_I2C0_RST>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +}