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[109.148.113.192]) by mx.google.com with ESMTPSA id w10sm42612498igr.18.2014.08.18.03.32.09 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Aug 2014 03:32:11 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/8] ARM: sti: Add two new clock definitions for use with ST's NAND controllers Date: Mon, 18 Aug 2014 11:31:53 +0100 Message-Id: <1408357919-19793-3-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1408357919-19793-1-git-send-email-lee.jones@linaro.org> References: <1408357919-19793-1-git-send-email-lee.jones@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140818_033232_802033_041DC6CD X-CRM114-Status: UNSURE ( 9.03 ) X-CRM114-Notice: Please train this message. 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X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.178 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 The EMISS and NAND Control clocks are used when conducting operations on attached NAND Flash chips. Reviewed-By: Pekon Gupta Signed-off-by: Lee Jones --- include/dt-bindings/clock/stih416-clks.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h index f9bdbd1..3a8c979 100644 --- a/include/dt-bindings/clock/stih416-clks.h +++ b/include/dt-bindings/clock/stih416-clks.h @@ -7,10 +7,12 @@ /* CLOCKGEN A0 */ #define CLK_ICN_REG 0 +#define CLK_EMISS 3 #define CLK_ETH1_PHY 4 /* CLOCKGEN A1 */ #define CLK_ICN_IF_2 0 #define CLK_GMAC0_PHY 3 +#define CLK_NAND_CTRL 4 #endif