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[2001:1868:205::9]) by mx.google.com with ESMTPS id s4si2540879pdr.50.2014.08.08.06.45.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Aug 2014 06:45:48 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XFkTW-0005JN-Kc; Fri, 08 Aug 2014 13:44:54 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XFkTT-0005AP-LA for linux-arm-kernel@lists.infradead.org; Fri, 08 Aug 2014 13:44:52 +0000 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 483647907; Fri, 08 Aug 2014 21:44:29 +0800 Received: from mtksdtcf02.mediatek.inc (10.21.12.142) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Fri, 8 Aug 2014 21:44:29 +0800 From: Joe.C To: , , Russell King , Matthias Brugger , Olof Johansson , Jonas Jensen , Arnd Bergmann , open list Subject: [PATCH v2 2/4] arm: mediatek: Add support for GIC interrupt polarity extension. Date: Fri, 8 Aug 2014 21:43:29 +0800 Message-ID: <1407505411-2207-3-git-send-email-srv_yingjoe.chen@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1407505411-2207-1-git-send-email-srv_yingjoe.chen@mediatek.com> References: <1407505411-2207-1-git-send-email-srv_yingjoe.chen@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140808_064452_116783_9F28457C X-CRM114-Status: GOOD ( 14.91 ) X-Spam-Score: 1.3 (+) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (1.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- 1.3 RDNS_NONE Delivered to internal network by a host with no rDNS 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines Cc: hc.yen@mediatek.com, eddie.huang@mediatek.com, yh.chen@mediatek.com, nathan.chung@mediatek.com, srv_heupstream@mediatek.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: "Joe.C" Mediatek SoCs have an interrupt polarity extension which allows to swap the polarity for given interrupts. Signed-off-by: Joe.C --- arch/arm/mach-mediatek/Makefile | 2 +- arch/arm/mach-mediatek/common.h | 19 ++++++++++++ arch/arm/mach-mediatek/intpol.c | 61 +++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mediatek/mediatek.c | 10 +++++++ 4 files changed, 91 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-mediatek/common.h create mode 100644 arch/arm/mach-mediatek/intpol.c diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile index 43e619f..82c39d8 100644 --- a/arch/arm/mach-mediatek/Makefile +++ b/arch/arm/mach-mediatek/Makefile @@ -1 +1 @@ -obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o +obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o intpol.o diff --git a/arch/arm/mach-mediatek/common.h b/arch/arm/mach-mediatek/common.h new file mode 100644 index 0000000..8f2bbeb --- /dev/null +++ b/arch/arm/mach-mediatek/common.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2014 Mediatek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __MEDIATEK_COMMON_H__ +#define __MEDIATEK_COMMON_H__ + +extern char init_intpol(void); + +#endif /* __MEDIATEK_COMMON_H__ */ diff --git a/arch/arm/mach-mediatek/intpol.c b/arch/arm/mach-mediatek/intpol.c new file mode 100644 index 0000000..65ccc7c --- /dev/null +++ b/arch/arm/mach-mediatek/intpol.c @@ -0,0 +1,61 @@ +/* + * This file contains common code that is intended to be used across + * boards so that it's not replicated. + * + * Copyright (C) 2014 Mediatek Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include + +#define GIC_HW_IRQ_BASE 32 +#define INT_POL_INDEX(a) ((a) - GIC_HW_IRQ_BASE) + +static void __iomem *int_pol_base; + +static int mtk_int_pol_set_type(struct irq_data *d, unsigned int type) +{ + unsigned int irq = d->hwirq; + u32 offset, reg_index, value; + + offset = INT_POL_INDEX(irq) & 0x1F; + reg_index = INT_POL_INDEX(irq) >> 5; + + /* This arch extension was called with irq_controller_lock held, + so the read-modify-write will be atomic */ + value = readl(int_pol_base + reg_index * 4); + if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) + value |= (1 << offset); + else + value &= ~(1 << offset); + writel(value, int_pol_base + reg_index * 4); + + return 0; +} + +void init_intpol(void) +{ + struct device_node *node; + + node = of_find_compatible_node(NULL, NULL, "mediatek,mt6577-intpol"); + if (!node) + return; + + int_pol_base = of_io_request_and_map(node, 0, "intpol"); + if (IS_ERR(int_pol_base)) { + pr_warn("Can't get resource\n"); + return; + } + + gic_arch_extn.irq_set_type = mtk_int_pol_set_type; +} diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c index 48051a2..aa10c70 100644 --- a/arch/arm/mach-mediatek/mediatek.c +++ b/arch/arm/mach-mediatek/mediatek.c @@ -16,6 +16,15 @@ */ #include #include +#include + +#include "common.h" + +static void __init mediatek_init_irq(void) +{ + init_intpol(); + irqchip_init(); +} static const char * const mediatek_board_dt_compat[] = { "mediatek,mt6589", @@ -26,4 +35,5 @@ static const char * const mediatek_board_dt_compat[] = { DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)") .dt_compat = mediatek_board_dt_compat, + .init_irq = mediatek_init_irq, MACHINE_END