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[2001:1868:205::9]) by mx.google.com with ESMTPS id df8si1103784pdb.68.2014.08.06.18.38.09 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Aug 2014 18:38:09 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XFCdV-0002DE-7q; Thu, 07 Aug 2014 01:36:57 +0000 Received: from mail-pa0-f53.google.com ([209.85.220.53]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XFCdK-00025F-Ba for linux-arm-kernel@lists.infradead.org; Thu, 07 Aug 2014 01:36:46 +0000 Received: by mail-pa0-f53.google.com with SMTP id rd3so4360574pab.26 for ; Wed, 06 Aug 2014 18:36:25 -0700 (PDT) X-Received: by 10.70.33.33 with SMTP id o1mr6715523pdi.39.1407375385544; Wed, 06 Aug 2014 18:36:25 -0700 (PDT) Received: from localhost.localdomain ([180.150.153.56]) by mx.google.com with ESMTPSA id l3sm2588490pbq.8.2014.08.06.18.36.21 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Aug 2014 18:36:25 -0700 (PDT) From: Zhangfei Gao To: Mike Turquette , haojian.zhuang@linaro.org, haifeng.yan@linaro.org, jchxue@gmail.com, xuwei5@hisilicon.com Subject: [PATCH v4 3/4] clk: hix5hd2: add watchdog0 clocks Date: Thu, 7 Aug 2014 09:36:00 +0800 Message-Id: <1407375361-24958-4-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1407375361-24958-1-git-send-email-zhangfei.gao@linaro.org> References: <1407375361-24958-1-git-send-email-zhangfei.gao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140806_183646_419312_DB14AD62 X-CRM114-Status: UNSURE ( 9.48 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.4 (-) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-1.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.53 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.220.53 listed in wl.mailspike.net] Cc: Zhangfei Gao , Guoxiong Yan , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Guoxiong Yan hix5hd2 add watchdog0 clocks Signed-off-by: Guoxiong Yan Signed-off-by: Zhangfei Gao --- drivers/clk/hisilicon/clk-hix5hd2.c | 5 +++++ include/dt-bindings/clock/hix5hd2-clock.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/drivers/clk/hisilicon/clk-hix5hd2.c b/drivers/clk/hisilicon/clk-hix5hd2.c index d2e0888..d6a2189 100644 --- a/drivers/clk/hisilicon/clk-hix5hd2.c +++ b/drivers/clk/hisilicon/clk-hix5hd2.c @@ -95,6 +95,11 @@ static struct hisi_gate_clock hix5hd2_gate_clks[] __initdata = { { HIX5HD2_FWD_SYS_CLK, "clk_fwd_sys", "clk_fwd_bus", 0, 0xcc, 5, 0, }, { HIX5HD2_MAC0_PHY_CLK, "clk_fephy", "clk_fwd_sys", CLK_SET_RATE_PARENT, 0x120, 0, 0, }, + /* wdg0 */ + { HIX5HD2_WDG0_CLK, "clk_wdg0", "24m", + CLK_SET_RATE_PARENT, 0x178, 0, 0, }, + { HIX5HD2_WDG0_RST, "rst_wdg0", "clk_wdg0", + CLK_SET_RATE_PARENT, 0x178, 4, CLK_GATE_SET_TO_DISABLE, }, }; enum hix5hd2_clk_type { diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index 5bd4135..b8e3c9d 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -60,6 +60,8 @@ #define HIX5HD2_SD_CIU_CLK 136 #define HIX5HD2_SD_BIU_CLK 137 #define HIX5HD2_SD_CIU_RST 138 +#define HIX5HD2_WDG0_CLK 139 +#define HIX5HD2_WDG0_RST 140 /* complex */ #define HIX5HD2_MAC0_CLK 192