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[109.148.237.85]) by mx.google.com with ESMTPSA id q11sm25317390igr.7.2014.07.14.07.33.45 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 14 Jul 2014 07:33:47 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, ajitpal.singh@st.com Subject: [PATCH v2 02/11] ARM: stih416: Add Pinctrl settings for PWM Date: Mon, 14 Jul 2014 15:33:23 +0100 Message-Id: <1405348412-7352-3-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> References: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416 based development boards. Signed-off-by: Ajit Pal Singh Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416-pinctrl.dtsi | 50 ++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi index ee6c119..04e61d6 100644 --- a/arch/arm/boot/dts/stih416-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi @@ -207,6 +207,29 @@ }; }; }; + + pwm1 { + pinctrl_pwm1_chan0_default: pwm1-0-default { + st,pins { + pwm-out = <&PIO3 0 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan1_default: pwm1-1-default { + st,pins { + pwm-out = <&PIO4 4 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan2_default: pwm1-2-default { + st,pins { + pwm-out = <&PIO4 6 ALT3 OUT>; + }; + }; + pinctrl_pwm1_chan3_default: pwm1-3-default { + st,pins { + pwm-out = <&PIO4 7 ALT3 OUT>; + }; + }; + }; }; pin-controller-front { @@ -301,6 +324,14 @@ st,bank-name = "PIO31"; }; + pwm0 { + pinctrl_pwm0_chan0_default: pwm0-0-default { + st,pins { + pwm-out = <&PIO9 7 ALT2 OUT>; + }; + }; + }; + serial2-oe { pinctrl_serial2_oe: serial2-1 { st,pins { @@ -467,6 +498,25 @@ }; }; }; + + pwm0 { + pinctrl_pwm0_chan1_default: pwm0-1-default { + st,pins { + pwm-out = <&PIO13 2 ALT2 OUT>; + }; + }; + pinctrl_pwm0_chan2_default: pwm0-2-default { + st,pins { + pwm-out = <&PIO15 2 ALT4 OUT>; + }; + }; + pinctrl_pwm0_chan3_default: pwm0-3-default { + st,pins { + pwm-out = <&PIO17 4 ALT1 OUT>; + }; + }; + }; + }; pin-controller-fvdp-fe {