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[209.132.180.67]) by mx.google.com with ESMTP id hb10si23163823pbd.77.2014.06.30.06.19.15; Mon, 30 Jun 2014 06:19:15 -0700 (PDT) Received-SPF: none (google.com: linux-samsung-soc-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752627AbaF3NTN (ORCPT + 8 others); Mon, 30 Jun 2014 09:19:13 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:60295 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752734AbaF3NTI (ORCPT ); Mon, 30 Jun 2014 09:19:08 -0400 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N7Z000DBGZUSZ90@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Mon, 30 Jun 2014 22:19:07 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.48]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 38.39.24374.AC361B35; Mon, 30 Jun 2014 22:19:06 +0900 (KST) X-AuditID: cbfee68d-b7fd46d000005f36-93-53b163cacfdb Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 6C.98.05196.AC361B35; Mon, 30 Jun 2014 22:19:06 +0900 (KST) Received: from kindness.dsn.sec.samsung.com ([12.36.165.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N7Z005Y2GZRAH00@mmp1.samsung.com>; Mon, 30 Jun 2014 22:19:06 +0900 (KST) From: Kukjin Kim To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Kukjin Kim , Linus Walleij Subject: [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes Date: Tue, 01 Jul 2014 06:32:19 +0900 Message-id: <1404163947-3105-10-git-send-email-kgene.kim@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1404163947-3105-1-git-send-email-kgene.kim@samsung.com> References: <1404163947-3105-1-git-send-email-kgene.kim@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrPLMWRmVeSWpSXmKPExsVy+t8zA91TyRuDDW5tsLLoXXCVzWLKn+VM FpseX2O1mHF+H5MDi8eda3vYPDYvqffo27KK0ePzJrkAligum5TUnMyy1CJ9uwSujG8dq1gK XphUrFywhamB8b5aFyMnh4SAicS0c0fYIWwxiQv31rN1MXJxCAksY5RYMf8GUxcjB1jRxKvF EPFFjBLvfi9mhXB6mCT2Pl3JBNLNJqAhcfj9M3aQBhEBb4nl1xRBwswCARJ3tu1kBbGFBdwk LvzcxAZiswioSrQtOgdm8wq4SrRfus4GcYSCxLGpX1lBxnACxTcdCQAJCwm4SEzcuwtsrYTA bzaJ2fv2skLMEZD4NvkQC8SdshKbDjBDjJGUOLjiBssERuEFjAyrGEVTC5ILipPSiwz1ihNz i0vz0vWS83M3MUICt3cH4+0D1ocYk4HGTWSWEk3OBwZ+Xkm8obGZkYWpiamxkbmlGWnCSuK8 SQ+TgoQE0hNLUrNTUwtSi+KLSnNSiw8xMnFwSjUwunv/m3u++srNv9MrpzTtdLgwffFBdvY8 U9fHau6JD22/O13RufGh79ebuAmeZt4nlr7hO2p/eFfIzzNfPdmlj/3eKzQppq4vmT36vG5+ 76XXr+8fYrx1en+knb+jTm5e0u24OdtPck5bO2nJuf+KJis8erZ+ufN7+s5V7lcT0gOz0iwZ ozdM81ViKc5INNRiLipOBAC4w59kcgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjkeLIzCtJLcpLzFFi42I5/e+xgO6p5I3BBr96zSx6F1xls5jyZzmT xabH11gtZpzfx+TA4nHn2h42j81L6j36tqxi9Pi8SS6AJaqB0SYjNTEltUghNS85PyUzL91W yTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMHaKWSQlliTilQKCCxuFhJ3w7ThNAQN10L mMYIXd+QILgeIwM0kLCOMeNbxyqWghcmFSsXbGFqYLyv1sXIwSEhYCIx8WpxFyMnkCkmceHe erYuRi4OIYFFjBLvfi9mhXB6mCT2Pl3JBFLFJqAhcfj9M3aQZhEBb4nl1xRBwswCARJ3tu1k BbGFBdwkLvzcxAZiswioSrQtOgdm8wq4SrRfus4GsUxB4tjUr6wgYziB4puOBICEhQRcJCbu 3cU6gZF3ASPDKkbR1ILkguKk9FwjveLE3OLSvHS95PzcTYzguHgmvYNxVYPFIUYBDkYlHl6N ZRuChVgTy4orcw8xSnAwK4nw3vTZGCzEm5JYWZValB9fVJqTWnyI0RToqInMUqLJ+cCYzSuJ NzQ2MTOyNDKzMDIxN1cS5z3Yah0oJJCeWJKanZpakFoE08fEwSnVwDjHlufqE06ljgufanq6 +5hsexY+Ci5m2/hssS2fnlfv/P6mM67xy7xO1kzPn2t/lTGprEpc7d9C58U1CTMsAm7s1VlU L6TQpjx5XkA2z7T7Hft81N4ciunxvqtXl76yZf535hrHkwGxdsen67+WFPLoZpJ8E6/z/l/Q j51Gk3zXyj1MFvzSq8RSnJFoqMVcVJwIAK5wtKKhAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kgene.kim@samsung.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch removes gpio codes for s5pc100 SoC. Signed-off-by: Kukjin Kim Cc: Linus Walleij Acked-by: Linus Walleij --- drivers/gpio/gpio-samsung.c | 276 ------------------------------------------- 1 file changed, 276 deletions(-) diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index d12945c..7d4281e 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -1170,267 +1170,6 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { }; /* - * S5PC100 GPIO bank summary: - * - * Bank GPIOs Style INT Type - * A0 8 4Bit GPIO_INT0 - * A1 5 4Bit GPIO_INT1 - * B 8 4Bit GPIO_INT2 - * C 5 4Bit GPIO_INT3 - * D 7 4Bit GPIO_INT4 - * E0 8 4Bit GPIO_INT5 - * E1 6 4Bit GPIO_INT6 - * F0 8 4Bit GPIO_INT7 - * F1 8 4Bit GPIO_INT8 - * F2 8 4Bit GPIO_INT9 - * F3 4 4Bit GPIO_INT10 - * G0 8 4Bit GPIO_INT11 - * G1 3 4Bit GPIO_INT12 - * G2 7 4Bit GPIO_INT13 - * G3 7 4Bit GPIO_INT14 - * H0 8 4Bit WKUP_INT - * H1 8 4Bit WKUP_INT - * H2 8 4Bit WKUP_INT - * H3 8 4Bit WKUP_INT - * I 8 4Bit GPIO_INT15 - * J0 8 4Bit GPIO_INT16 - * J1 5 4Bit GPIO_INT17 - * J2 8 4Bit GPIO_INT18 - * J3 8 4Bit GPIO_INT19 - * J4 4 4Bit GPIO_INT20 - * K0 8 4Bit None - * K1 6 4Bit None - * K2 8 4Bit None - * K3 8 4Bit None - * L0 8 4Bit None - * L1 8 4Bit None - * L2 8 4Bit None - * L3 8 4Bit None - */ - -static struct samsung_gpio_chip s5pc100_gpios_4bit[] = { -#ifdef CONFIG_CPU_S5PC100 - { - .chip = { - .base = S5PC100_GPA0(0), - .ngpio = S5PC100_GPIO_A0_NR, - .label = "GPA0", - }, - }, { - .chip = { - .base = S5PC100_GPA1(0), - .ngpio = S5PC100_GPIO_A1_NR, - .label = "GPA1", - }, - }, { - .chip = { - .base = S5PC100_GPB(0), - .ngpio = S5PC100_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S5PC100_GPC(0), - .ngpio = S5PC100_GPIO_C_NR, - .label = "GPC", - }, - }, { - .chip = { - .base = S5PC100_GPD(0), - .ngpio = S5PC100_GPIO_D_NR, - .label = "GPD", - }, - }, { - .chip = { - .base = S5PC100_GPE0(0), - .ngpio = S5PC100_GPIO_E0_NR, - .label = "GPE0", - }, - }, { - .chip = { - .base = S5PC100_GPE1(0), - .ngpio = S5PC100_GPIO_E1_NR, - .label = "GPE1", - }, - }, { - .chip = { - .base = S5PC100_GPF0(0), - .ngpio = S5PC100_GPIO_F0_NR, - .label = "GPF0", - }, - }, { - .chip = { - .base = S5PC100_GPF1(0), - .ngpio = S5PC100_GPIO_F1_NR, - .label = "GPF1", - }, - }, { - .chip = { - .base = S5PC100_GPF2(0), - .ngpio = S5PC100_GPIO_F2_NR, - .label = "GPF2", - }, - }, { - .chip = { - .base = S5PC100_GPF3(0), - .ngpio = S5PC100_GPIO_F3_NR, - .label = "GPF3", - }, - }, { - .chip = { - .base = S5PC100_GPG0(0), - .ngpio = S5PC100_GPIO_G0_NR, - .label = "GPG0", - }, - }, { - .chip = { - .base = S5PC100_GPG1(0), - .ngpio = S5PC100_GPIO_G1_NR, - .label = "GPG1", - }, - }, { - .chip = { - .base = S5PC100_GPG2(0), - .ngpio = S5PC100_GPIO_G2_NR, - .label = "GPG2", - }, - }, { - .chip = { - .base = S5PC100_GPG3(0), - .ngpio = S5PC100_GPIO_G3_NR, - .label = "GPG3", - }, - }, { - .chip = { - .base = S5PC100_GPI(0), - .ngpio = S5PC100_GPIO_I_NR, - .label = "GPI", - }, - }, { - .chip = { - .base = S5PC100_GPJ0(0), - .ngpio = S5PC100_GPIO_J0_NR, - .label = "GPJ0", - }, - }, { - .chip = { - .base = S5PC100_GPJ1(0), - .ngpio = S5PC100_GPIO_J1_NR, - .label = "GPJ1", - }, - }, { - .chip = { - .base = S5PC100_GPJ2(0), - .ngpio = S5PC100_GPIO_J2_NR, - .label = "GPJ2", - }, - }, { - .chip = { - .base = S5PC100_GPJ3(0), - .ngpio = S5PC100_GPIO_J3_NR, - .label = "GPJ3", - }, - }, { - .chip = { - .base = S5PC100_GPJ4(0), - .ngpio = S5PC100_GPIO_J4_NR, - .label = "GPJ4", - }, - }, { - .chip = { - .base = S5PC100_GPK0(0), - .ngpio = S5PC100_GPIO_K0_NR, - .label = "GPK0", - }, - }, { - .chip = { - .base = S5PC100_GPK1(0), - .ngpio = S5PC100_GPIO_K1_NR, - .label = "GPK1", - }, - }, { - .chip = { - .base = S5PC100_GPK2(0), - .ngpio = S5PC100_GPIO_K2_NR, - .label = "GPK2", - }, - }, { - .chip = { - .base = S5PC100_GPK3(0), - .ngpio = S5PC100_GPIO_K3_NR, - .label = "GPK3", - }, - }, { - .chip = { - .base = S5PC100_GPL0(0), - .ngpio = S5PC100_GPIO_L0_NR, - .label = "GPL0", - }, - }, { - .chip = { - .base = S5PC100_GPL1(0), - .ngpio = S5PC100_GPIO_L1_NR, - .label = "GPL1", - }, - }, { - .chip = { - .base = S5PC100_GPL2(0), - .ngpio = S5PC100_GPIO_L2_NR, - .label = "GPL2", - }, - }, { - .chip = { - .base = S5PC100_GPL3(0), - .ngpio = S5PC100_GPIO_L3_NR, - .label = "GPL3", - }, - }, { - .chip = { - .base = S5PC100_GPL4(0), - .ngpio = S5PC100_GPIO_L4_NR, - .label = "GPL4", - }, - }, { - .base = (S5P_VA_GPIO + 0xC00), - .irq_base = IRQ_EINT(0), - .chip = { - .base = S5PC100_GPH0(0), - .ngpio = S5PC100_GPIO_H0_NR, - .label = "GPH0", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO + 0xC20), - .irq_base = IRQ_EINT(8), - .chip = { - .base = S5PC100_GPH1(0), - .ngpio = S5PC100_GPIO_H1_NR, - .label = "GPH1", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO + 0xC40), - .irq_base = IRQ_EINT(16), - .chip = { - .base = S5PC100_GPH2(0), - .ngpio = S5PC100_GPIO_H2_NR, - .label = "GPH2", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO + 0xC60), - .irq_base = IRQ_EINT(24), - .chip = { - .base = S5PC100_GPH3(0), - .ngpio = S5PC100_GPIO_H3_NR, - .label = "GPH3", - .to_irq = samsung_gpiolib_to_irq, - }, - }, -#endif -}; - -/* * Followings are the gpio banks in S5PV210/S5PC110 * * The 'config' member when left to NULL, is initialized to the default @@ -1681,21 +1420,6 @@ static __init int samsung_gpiolib_init(void) S3C64XX_VA_GPIO); samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, ARRAY_SIZE(s3c64xx_gpios_4bit2)); - } else if (soc_is_s5pc100()) { - group = 0; - chip = s5pc100_gpios_4bit; - nr_chips = ARRAY_SIZE(s5pc100_gpios_4bit); - - for (i = 0; i < nr_chips; i++, chip++) { - if (!chip->config) { - chip->config = &samsung_gpio_cfgs[3]; - chip->group = group++; - } - } - samsung_gpiolib_add_4bit_chips(s5pc100_gpios_4bit, nr_chips, S5P_VA_GPIO); -#if defined(CONFIG_CPU_S5PC100) && defined(CONFIG_S5P_GPIO_INT) - s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); -#endif } else if (soc_is_s5pv210()) { group = 0; chip = s5pv210_gpios_4bit;