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[82.33.25.158]) by mx.google.com with ESMTPSA id gm8sm48061720wib.23.2014.06.04.05.37.08 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 04 Jun 2014 05:37:09 -0700 (PDT) From: Daniel Thompson To: Thomas Gleixner , Jason Cooper Cc: Daniel Thompson , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: [PATCH] irqchip: nvic: Use the generic noop function Date: Wed, 4 Jun 2014 13:37:05 +0100 Message-Id: <1401885425-12378-1-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.0 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.thompson@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Using the generic function saves looking up this custom one in a source navigator. Signed-off-by: Daniel Thompson Cc: Thomas Gleixner Cc: Jason Cooper --- drivers/irqchip/irq-nvic.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c index 70bdf6e..c935c61 100644 --- a/drivers/irqchip/irq-nvic.c +++ b/drivers/irqchip/irq-nvic.c @@ -49,14 +49,6 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) handle_IRQ(irq, regs); } -static void nvic_eoi(struct irq_data *d) -{ - /* - * This is a no-op as end of interrupt is signaled by the exception - * return sequence. - */ -} - static int __init nvic_of_init(struct device_node *node, struct device_node *parent) { @@ -102,7 +94,7 @@ static int __init nvic_of_init(struct device_node *node, gc->chip_types[0].regs.disable = NVIC_ICER; gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; - gc->chip_types[0].chip.irq_eoi = nvic_eoi; + gc->chip_types[0].chip.irq_eoi = irq_gc_noop; /* disable interrupts */ writel_relaxed(~0, gc->reg_base + NVIC_ICER);