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[64.2.3.195]) by mx.google.com with ESMTPSA id qh3sm10016919igb.17.2014.05.24.00.09.25 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sat, 24 May 2014 00:09:25 -0700 (PDT) Received: from localhost.localdomain (apinskidesktop [127.0.0.1]) by localhost.localdomain (8.14.3/8.14.3/Debian-9.4) with ESMTP id s4O72MBW009808 (version=TLSv1/SSLv3 cipher=DHE-DSS-AES256-SHA bits=256 verify=NO); Sat, 24 May 2014 00:02:22 -0700 Received: (from apinski@localhost) by localhost.localdomain (8.14.3/8.14.3/Submit) id s4O72MGP009807; Sat, 24 May 2014 00:02:22 -0700 From: Andrew Pinski To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Andrew Pinski Subject: [PATCH 16/24] ARM64:ILP32 use the standard start_thread for ILP32 so the processor state is not AARCH32. Date: Sat, 24 May 2014 00:02:11 -0700 Message-Id: <1400914939-9708-17-git-send-email-apinski@cavium.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1400914939-9708-1-git-send-email-apinski@cavium.com> References: <1400914939-9708-1-git-send-email-apinski@cavium.com> To: linux-arm-kernel@lists.infradead.org To: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: apinski@cavium.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , If we have both ILP32 and AARCH32 compiled in, we need use the non compat start thread for ILP32. We have to use TIF_32BIT_AARCH64 explicit due to header depency issues. Thanks, Andrew Pinski Signed-off-by: Andrew Pinski --- arch/arm64/include/asm/processor.h | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index ee487f3..c61deaf 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -103,6 +103,15 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc, static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { +#ifdef CONFIG_ARM64_ILP32 + /* ILP32 thread are started the same way as LP64 threads. + Note we cannot use is_ilp32_compat_task here as that + would introduce a header depency issue. */ + if (test_thread_flag(TIF_32BIT_AARCH64)) { + start_thread(regs, pc, sp); + return; + } +#endif start_thread_common(regs, pc); regs->pstate = COMPAT_PSR_MODE_USR; if (pc & 1)