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[209.132.180.67]) by mx.google.com with ESMTP id ek4si2938611pbc.167.2014.04.24.08.43.03; Thu, 24 Apr 2014 08:43:03 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758104AbaDXPm6 (ORCPT + 9 others); Thu, 24 Apr 2014 11:42:58 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:46257 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758191AbaDXPmz (ORCPT ); Thu, 24 Apr 2014 11:42:55 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3OFgPAp011067; Thu, 24 Apr 2014 10:42:25 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3OFgP7s020100; Thu, 24 Apr 2014 10:42:25 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Thu, 24 Apr 2014 10:42:25 -0500 Received: from ula0393909.am.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3OFgOrE006840; Thu, 24 Apr 2014 10:42:25 -0500 From: Santosh Shilimkar To: CC: , , , , , , Santosh Shilimkar Subject: [PATCH 1/4] ARM: keystone: Switch over to coherent memory address space Date: Thu, 24 Apr 2014 11:42:19 -0400 Message-ID: <1398354142-2767-2-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398354142-2767-1-git-send-email-santosh.shilimkar@ti.com> References: <1398354142-2767-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: santosh.shilimkar@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , With late code patching updates for LPAE machines has merged now and memblock conversion from bootmem is on its way, Keystone can switch to the coherent memory address space which starts beyond 4GB boundary. The idmap alias needs are managed via virt_to_idmap() for boot purpose. Signed-off-by: Santosh Shilimkar --- arch/arm/mach-keystone/keystone.c | 48 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-keystone/memory.h | 24 +++++++++++++++++++ arch/arm/mach-keystone/platsmp.c | 18 +++++++++++++- 3 files changed, 89 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-keystone/memory.h diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c index e0b9e1b..155eb06 100644 --- a/arch/arm/mach-keystone/keystone.c +++ b/arch/arm/mach-keystone/keystone.c @@ -20,6 +20,9 @@ #include #include #include +#include + +#include "memory.h" #include "keystone.h" @@ -45,6 +48,50 @@ static void __init keystone_init(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } +static phys_addr_t keystone_virt_to_idmap(unsigned long x) +{ + return (phys_addr_t)(x) - CONFIG_PAGE_OFFSET + KEYSTONE_LOW_PHYS_START; +} + +static void __init keystone_init_meminfo(void) +{ + bool lpae = IS_ENABLED(CONFIG_ARM_LPAE); + bool pvpatch = IS_ENABLED(CONFIG_ARM_PATCH_PHYS_VIRT); + phys_addr_t offset = PHYS_OFFSET - KEYSTONE_LOW_PHYS_START; + phys_addr_t mem_start, mem_end; + + BUG_ON(meminfo.nr_banks < 1); + mem_start = meminfo.bank[0].start; + mem_end = mem_start + meminfo.bank[0].size - 1; + + /* nothing to do if we are running out of the <32-bit space */ + if (mem_start >= KEYSTONE_LOW_PHYS_START && + mem_end <= KEYSTONE_LOW_PHYS_END) + return; + + if (!lpae || !pvpatch) { + pr_crit("Enable %s%s%s to run outside 32-bit space\n", + !lpae ? __stringify(CONFIG_ARM_LPAE) : "", + (!lpae && !pvpatch) ? " and " : "", + !pvpatch ? __stringify(CONFIG_ARM_PATCH_PHYS_VIRT) : ""); + } + + if (mem_start < KEYSTONE_HIGH_PHYS_START || + mem_end > KEYSTONE_HIGH_PHYS_END) { + pr_crit("Invalid address space for memory (%08llx-%08llx)\n", + (u64)mem_start, (u64)mem_end); + } + + offset += KEYSTONE_HIGH_PHYS_START; + __pv_phys_pfn_offset = PFN_DOWN(offset); + __pv_offset = (offset - PAGE_OFFSET); + + /* Populate the arch idmap hook */ + arch_virt_to_idmap = keystone_virt_to_idmap; + + pr_info("Switching to high address space at 0x%llx\n", (u64)offset); +} + static const char *keystone_match[] __initconst = { "ti,keystone", NULL, @@ -76,4 +123,5 @@ DT_MACHINE_START(KEYSTONE, "Keystone") .init_machine = keystone_init, .dt_compat = keystone_match, .restart = keystone_restart, + .init_meminfo = keystone_init_meminfo, MACHINE_END diff --git a/arch/arm/mach-keystone/memory.h b/arch/arm/mach-keystone/memory.h new file mode 100644 index 0000000..b854fb1 --- /dev/null +++ b/arch/arm/mach-keystone/memory.h @@ -0,0 +1,24 @@ +/* + * Copyright 2014 Texas Instruments, Inc. + * Santosh Shilimkar + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ +#ifndef __MEMORY_H +#define __MEMORY_H + +#define MAX_PHYSMEM_BITS 36 +#define SECTION_SIZE_BITS 34 + +#define KEYSTONE_LOW_PHYS_START 0x80000000ULL +#define KEYSTONE_LOW_PHYS_SIZE 0x80000000ULL /* 2G */ +#define KEYSTONE_LOW_PHYS_END (KEYSTONE_LOW_PHYS_START + \ + KEYSTONE_LOW_PHYS_SIZE - 1) + +#define KEYSTONE_HIGH_PHYS_START 0x800000000ULL +#define KEYSTONE_HIGH_PHYS_SIZE 0x400000000ULL /* 16G */ +#define KEYSTONE_HIGH_PHYS_END (KEYSTONE_HIGH_PHYS_START + \ + KEYSTONE_HIGH_PHYS_SIZE - 1) +#endif /* __MEMORY_H */ diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c index 5cf0683..5f46a7c 100644 --- a/arch/arm/mach-keystone/platsmp.c +++ b/arch/arm/mach-keystone/platsmp.c @@ -17,13 +17,16 @@ #include #include +#include +#include +#include #include "keystone.h" static int keystone_smp_boot_secondary(unsigned int cpu, struct task_struct *idle) { - unsigned long start = virt_to_phys(&secondary_startup); + unsigned long start = virt_to_idmap(&secondary_startup); int error; pr_debug("keystone-smp: booting cpu %d, vector %08lx\n", @@ -36,6 +39,19 @@ static int keystone_smp_boot_secondary(unsigned int cpu, return error; } +#ifdef CONFIG_ARM_LPAE +static void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu) +{ + pgd_t *pgd0 = pgd_offset_k(0); + cpu_set_ttbr(1, __pa(pgd0) + TTBR1_OFFSET); + local_flush_tlb_all(); +} +#else +static inline void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu) +{} +#endif + struct smp_operations keystone_smp_ops __initdata = { .smp_boot_secondary = keystone_smp_boot_secondary, + .smp_secondary_init = keystone_smp_secondary_initmem, };