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[83.205.74.172]) by mx.google.com with ESMTPSA id t1sm3028163wia.1.2014.04.04.00.48.01 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 04 Apr 2014 00:48:02 -0700 (PDT) From: Daniel Lezcano To: kgene.kim@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, t.figa@samsung.com, linaro-kernel@lists.linaro.org, rjw@rjwysocki.net Subject: [PATCH 12/17] ARM: exynos: cpuidle: Move S5P_CHECK_AFTR in a header Date: Fri, 4 Apr 2014 09:47:58 +0200 Message-Id: <1396597683-6969-13-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396597683-6969-1-git-send-email-daniel.lezcano@linaro.org> References: <1396597683-6969-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.lezcano@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Move the S5P_CHECK_AFTR definition to the header it belongs to. Signed-off-by: Daniel Lezcano --- arch/arm/mach-exynos/cpuidle.c | 2 -- arch/arm/mach-exynos/regs-pmu.h | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c index 635b09c..839185e 100644 --- a/arch/arm/mach-exynos/cpuidle.c +++ b/arch/arm/mach-exynos/cpuidle.c @@ -38,8 +38,6 @@ S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \ (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1)) -#define S5P_CHECK_AFTR 0xFCBA0D10 - #define EXYNOS5_PWR_CTRL1 (S5P_VA_CMU + 0x01020) #define EXYNOS5_PWR_CTRL2 (S5P_VA_CMU + 0x01024) diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 7c029ce..651014a 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -119,6 +119,7 @@ #define S5P_INT_LOCAL_PWR_EN 0x7 #define S5P_CHECK_SLEEP 0x00000BAD +#define S5P_CHECK_AFTR 0xFCBA0D10 /* Only for EXYNOS4210 */ #define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)