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[209.132.180.67]) by mx.google.com with ESMTP id mu18si967089pab.142.2014.03.05.22.10.50; Wed, 05 Mar 2014 22:10:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751977AbaCFGKs (ORCPT + 8 others); Thu, 6 Mar 2014 01:10:48 -0500 Received: from mail-pb0-f47.google.com ([209.85.160.47]:35389 "EHLO mail-pb0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751663AbaCFGKr (ORCPT ); Thu, 6 Mar 2014 01:10:47 -0500 Received: by mail-pb0-f47.google.com with SMTP id up15so2148364pbc.6 for ; Wed, 05 Mar 2014 22:10:46 -0800 (PST) X-Received: by 10.68.113.194 with SMTP id ja2mr1041769pbb.30.1394086246341; Wed, 05 Mar 2014 22:10:46 -0800 (PST) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id un5sm29976020pab.3.2014.03.05.22.10.41 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 05 Mar 2014 22:10:45 -0800 (PST) From: Tushar Behera To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, rob@landley.net, linux@maxim.org.za, plagnioj@jcrosoft.com, kgene.kim@samsung.com, t.figa@samsung.com Subject: [PATCH 1/2] dt-bindings: clock: Move at91.h to dt-bindigs/clock Date: Thu, 6 Mar 2014 11:34:43 +0530 Message-Id: <1394085884-13081-2-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1394085884-13081-1-git-send-email-tushar.behera@linaro.org> References: <1394085884-13081-1-git-send-email-tushar.behera@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: tushar.behera@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Most of the clock related dt-binding header files are located in dt-bindings/clock folder. It would be good to keep all the similar header files at a single location. Signed-off-by: Tushar Behera CC: Rob Landley CC: Andrew Victor CC: Jean-Christophe Plagniol-Villard Acked-by: Boris BREZILLON Acked-by: Nicolas Ferre --- .../devicetree/bindings/clock/at91-clock.txt | 2 +- arch/arm/boot/dts/sama5d3.dtsi | 2 +- arch/arm/boot/dts/sama5d3_mci2.dtsi | 2 +- arch/arm/boot/dts/sama5d3_tcb1.dtsi | 2 +- arch/arm/boot/dts/sama5d3_uart.dtsi | 2 +- include/dt-bindings/{clk => clock}/at91.h | 0 6 files changed, 5 insertions(+), 5 deletions(-) rename include/dt-bindings/{clk => clock}/at91.h (100%) diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clock/at91.h similarity index 100% rename from include/dt-bindings/clk/at91.h rename to include/dt-bindings/clock/at91.h diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt index cd5e239..6794cdc 100644 --- a/Documentation/devicetree/bindings/clock/at91-clock.txt +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt @@ -62,7 +62,7 @@ Required properties for PMC node: - interrupt-controller : tell that the PMC is an interrupt controller. - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id, and reflect the bit position in the PMC_ER/DR/SR registers. - You can use the dt macros defined in dt-bindings/clk/at91.h. + You can use the dt macros defined in dt-bindings/clock/at91.h. 0 (AT91_PMC_MOSCS) -> main oscillator ready 1 (AT91_PMC_LOCKA) -> PLL A ready 2 (AT91_PMC_LOCKB) -> PLL B ready diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 3d5faf8..8c977b5 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -13,7 +13,7 @@ #include #include #include -#include +#include / { model = "Atmel SAMA5D3 family SoC"; diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi index b029fe7..1b02208 100644 --- a/arch/arm/boot/dts/sama5d3_mci2.dtsi +++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi @@ -9,7 +9,7 @@ #include #include -#include +#include / { ahb { diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi index 382b044..0284845 100644 --- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi +++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi @@ -9,7 +9,7 @@ #include #include -#include +#include / { aliases { diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi index a9fa75e..7a8d4c6 100644 --- a/arch/arm/boot/dts/sama5d3_uart.dtsi +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi @@ -9,7 +9,7 @@ #include #include -#include +#include / { aliases {