From patchwork Thu Feb 6 11:31:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 24247 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vc0-f197.google.com (mail-vc0-f197.google.com [209.85.220.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id AA07820445 for ; Thu, 6 Feb 2014 11:32:52 +0000 (UTC) Received: by mail-vc0-f197.google.com with SMTP id hq11sf3840137vcb.8 for ; Thu, 06 Feb 2014 03:32:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=EUe+gMYMmZaKbMDhoqmc8+VtbB7eDgzlQbXoiW7mqiQ=; b=Ee1/EuIGRG4MT77chf3sJP7RfO1tsT6Inmdw7anpqYK8ZR9QL6U4hqbARtSewd+hFQ jhtGeV98JQOLaxxeILqu7Ns9neUQDl2pD3FeGrJ5Hm6ou5fo1VmJCdZtGDEhkND1wBPe Ac8xlolwey8PUfc4tC0qeYZMF6i9EqbKite8UE4c5Me4oeYyG001apBbx+j9ceEMz18/ CA7XRNimdiEarVt6PKQmGNC4TN672wAL8tvdm/vk1YSU91AZijUdCxSatsq6gobCYvO2 lCf9Zv2QnEY7SL523NbOrLRKnD+28Xv28GJYegEQ9+FTl4iqji3Seeat57wKvt3KRIzN 5WOQ== X-Gm-Message-State: ALoCoQm8WRZfa90LOsShztkGfJMnesGRu2PBTjXUmz85SrhlzsM6L4zZOsfb1AlSh8J96Jol/giy X-Received: by 10.224.47.129 with SMTP id n1mr3183415qaf.4.1391686371540; Thu, 06 Feb 2014 03:32:51 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.38.47 with SMTP id s44ls601512qgs.70.gmail; Thu, 06 Feb 2014 03:32:51 -0800 (PST) X-Received: by 10.52.246.133 with SMTP id xw5mr803110vdc.32.1391686371465; Thu, 06 Feb 2014 03:32:51 -0800 (PST) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by mx.google.com with ESMTPS id y3si162518vdo.71.2014.02.06.03.32.51 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Feb 2014 03:32:51 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.172; Received: by mail-vc0-f172.google.com with SMTP id lf12so1333945vcb.3 for ; Thu, 06 Feb 2014 03:32:51 -0800 (PST) X-Received: by 10.220.191.134 with SMTP id dm6mr5506067vcb.16.1391686371394; Thu, 06 Feb 2014 03:32:51 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp5265vcz; Thu, 6 Feb 2014 03:32:50 -0800 (PST) X-Received: by 10.66.217.133 with SMTP id oy5mr84276pac.46.1391686370463; Thu, 06 Feb 2014 03:32:50 -0800 (PST) Received: from mail-pb0-f42.google.com (mail-pb0-f42.google.com [209.85.160.42]) by mx.google.com with ESMTPS id fl7si780380pad.258.2014.02.06.03.32.50 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Feb 2014 03:32:50 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.42 is neither permitted nor denied by best guess record for domain of anup.patel@linaro.org) client-ip=209.85.160.42; Received: by mail-pb0-f42.google.com with SMTP id jt11so1648123pbb.1 for ; Thu, 06 Feb 2014 03:32:50 -0800 (PST) X-Received: by 10.68.204.161 with SMTP id kz1mr12046813pbc.156.1391686370066; Thu, 06 Feb 2014 03:32:50 -0800 (PST) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id yd4sm2594758pbc.13.2014.02.06.03.32.45 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Feb 2014 03:32:48 -0800 (PST) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Cc: linux-arm-kernel@lists.infradead.org, linaro-kernel@lists.linaro.org, patches@linaro.org, patches@apm.com, Marc Zyngier , Christoffer Dall , Mark Rutland , Pranavkumar Sawargaonkar , Anup Patel Subject: [PATCH v4 06/10] ARM/ARM64: KVM: Emulate PSCI v0.2 SYSTEM_OFF and SYSTEM_RESET Date: Thu, 6 Feb 2014 17:01:38 +0530 Message-Id: <1391686302-19451-7-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1391686302-19451-1-git-send-email-anup.patel@linaro.org> References: <1391686302-19451-1-git-send-email-anup.patel@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: anup.patel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The PSCI v0.2 SYSTEM_OFF and SYSTEM_RESET functions are system-level functions hence cannot be fully emulated by in-kernel PSCI emulation code. To tackle this, we forward PSCI v0.2 SYSTEM_OFF and SYSTEM_RESET function calls from vcpu to user space (i.e. QEMU or KVMTOOL) via kvm_run structure using KVM_EXIT_SYSTEM_EVENT exit reasons. Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar Reviewed-by: Christoffer Dall --- arch/arm/kvm/psci.c | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c index 252acd0..1f1720a 100644 --- a/arch/arm/kvm/psci.c +++ b/arch/arm/kvm/psci.c @@ -85,6 +85,23 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) return KVM_PSCI_RET_SUCCESS; } +static inline void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type) +{ + memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event)); + vcpu->run->system_event.type = type; + vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT; +} + +static void kvm_psci_system_off(struct kvm_vcpu *vcpu) +{ + kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN); +} + +static void kvm_psci_system_reset(struct kvm_vcpu *vcpu) +{ + kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET); +} + int kvm_psci_version(struct kvm_vcpu *vcpu) { if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features)) @@ -95,6 +112,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu) static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) { + int ret = 1; unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); unsigned long val; @@ -114,13 +132,21 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) case KVM_PSCI_0_2_FN64_CPU_ON: val = kvm_psci_vcpu_on(vcpu); break; + case KVM_PSCI_0_2_FN_SYSTEM_OFF: + kvm_psci_system_off(vcpu); + val = KVM_PSCI_RET_SUCCESS; + ret = 0; + break; + case KVM_PSCI_0_2_FN_SYSTEM_RESET: + kvm_psci_system_reset(vcpu); + val = KVM_PSCI_RET_SUCCESS; + ret = 0; + break; case KVM_PSCI_0_2_FN_CPU_SUSPEND: case KVM_PSCI_0_2_FN_AFFINITY_INFO: case KVM_PSCI_0_2_FN_MIGRATE: case KVM_PSCI_0_2_FN_MIGRATE_INFO_TYPE: case KVM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU: - case KVM_PSCI_0_2_FN_SYSTEM_OFF: - case KVM_PSCI_0_2_FN_SYSTEM_RESET: case KVM_PSCI_0_2_FN64_CPU_SUSPEND: case KVM_PSCI_0_2_FN64_AFFINITY_INFO: case KVM_PSCI_0_2_FN64_MIGRATE: @@ -132,7 +158,7 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) } *vcpu_reg(vcpu, 0) = val; - return 1; + return ret; } static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)