From patchwork Thu Jan 23 10:31:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 23594 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ig0-f198.google.com (mail-ig0-f198.google.com [209.85.213.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id B2D08218BD for ; Thu, 23 Jan 2014 10:32:41 +0000 (UTC) Received: by mail-ig0-f198.google.com with SMTP id uq10sf6697237igb.1 for ; Thu, 23 Jan 2014 02:32:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=wLY8O0eWlNkWmqoDlz4phvRCY1BCy73GHJmDRP21iVw=; b=YxeexPTXKF5WA4LAxNya/we+4jpYisu7Myyaq1cBjS2bSCpaCqZV8OEYtWOFMjNR4D MmM0Vk10aRbAFW9YfFLwTljUP1AxmveKkZHOxu1WXbfO22KRnjhVQyWF3HepYEay9hFF Kra+vXkCuiletYDvyw9M1ZsnlqgLyyC6yMLsWi1KCC95a1DNrMbuavdt422cAynbOIjK Vxn0dtQmTBdqIbcMiVori79HQzsgUUrkIRKiV1wk6oIhyVn8bqb9EyOVP8hHnpZ8vfC7 urDeCrfkgSx+tUfuecVvO60he556X+xUEy6stoAznmuoqalc03A5fSLkgX9D0jj+I4do JDig== X-Gm-Message-State: ALoCoQlgjMcYMhLiL8kZreXzw6V4O0NhhNTiMDOWENJm7ymVCaQr+/dHzyOUoqeVv7Hkyb2Gv+Zx X-Received: by 10.42.70.142 with SMTP id f14mr2359988icj.6.1390473161013; Thu, 23 Jan 2014 02:32:41 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.61.163 with SMTP id q3ls274385qer.99.gmail; Thu, 23 Jan 2014 02:32:40 -0800 (PST) X-Received: by 10.58.37.232 with SMTP id b8mr4173584vek.27.1390473160915; Thu, 23 Jan 2014 02:32:40 -0800 (PST) Received: from mail-vc0-f171.google.com (mail-vc0-f171.google.com [209.85.220.171]) by mx.google.com with ESMTPS id zw4si6429257vec.36.2014.01.23.02.32.40 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 Jan 2014 02:32:40 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.171; Received: by mail-vc0-f171.google.com with SMTP id le5so935835vcb.2 for ; Thu, 23 Jan 2014 02:32:40 -0800 (PST) X-Received: by 10.220.109.1 with SMTP id h1mr4138751vcp.20.1390473160838; Thu, 23 Jan 2014 02:32:40 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp15970vcz; Thu, 23 Jan 2014 02:32:40 -0800 (PST) X-Received: by 10.195.13.113 with SMTP id ex17mr6233113wjd.0.1390473159820; Thu, 23 Jan 2014 02:32:39 -0800 (PST) Received: from mail-we0-f179.google.com (mail-we0-f179.google.com [74.125.82.179]) by mx.google.com with ESMTPS id bo3si8928419wib.43.2014.01.23.02.32.39 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 Jan 2014 02:32:39 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.179 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.179; Received: by mail-we0-f179.google.com with SMTP id w62so953915wes.10 for ; Thu, 23 Jan 2014 02:32:39 -0800 (PST) X-Received: by 10.181.13.112 with SMTP id ex16mr23762890wid.23.1390473159348; Thu, 23 Jan 2014 02:32:39 -0800 (PST) Received: from localhost.localdomain ([80.76.198.141]) by mx.google.com with ESMTPSA id ay6sm21257831wjb.23.2014.01.23.02.32.36 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 Jan 2014 02:32:38 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: linus.walleij@linaro.org, dwmw2@infradead.org, linux-mtd@lists.infradead.org, computersforpeace@gmail.com, Angus.Clark@st.com, DCG_UPD_stlinux_kernel@list.st.com, olivier.clergeaud@st.com, Lee Jones Subject: [PATCH RESEND v4 23/37] mtd: st_spi_fsm: Supply the N25Qxxx specific read configurations Date: Thu, 23 Jan 2014 10:31:11 +0000 Message-Id: <1390473085-24626-24-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1390473085-24626-1-git-send-email-lee.jones@linaro.org> References: <1390473085-24626-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The N25Qxxx Serial Flash devices required different sequence configurations depending on whether they're running in 24bit (3Byte) or 32bit (4Byte) mode. We provide those here. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 53 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 5582df0..3b56b6e 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -236,6 +236,15 @@ #define FLASH_CMD_READ4_1_1_4 0x6c #define FLASH_CMD_READ4_1_4_4 0xec +/* + * Flags to tweak operation of default read/write/erase routines + */ +#define CFG_READ_TOGGLE_32BIT_ADDR 0x00000001 +#define CFG_WRITE_TOGGLE_32BIT_ADDR 0x00000002 +#define CFG_WRITE_EX_32BIT_ADDR_DELAY 0x00000004 +#define CFG_ERASESEC_TOGGLE_32BIT_ADDR 0x00000008 +#define CFG_S25FL_CHECK_ERROR_FLAGS 0x00000010 + struct stfsm { struct device *dev; void __iomem *base; @@ -244,6 +253,7 @@ struct stfsm { struct mutex lock; struct flash_info *info; + uint32_t configuration; uint32_t fifo_dir_delay; bool booted_from_spi; bool reset_signal; @@ -438,6 +448,49 @@ static struct seq_rw_config default_write_configs[] = { {0x00, 0, 0, 0, 0, 0x00, 0, 0}, }; +/* + * [N25Qxxx] Configuration + */ +#define N25Q_VCR_DUMMY_CYCLES(x) (((x) & 0xf) << 4) +#define N25Q_VCR_XIP_DISABLED ((uint8_t)0x1 << 3) +#define N25Q_VCR_WRAP_CONT 0x3 + +/* N25Q 3-byte Address READ configurations + * - 'FAST' variants configured for 8 dummy cycles. + * + * Note, the number of dummy cycles used for 'FAST' READ operations is + * configurable and would normally be tuned according to the READ command and + * operating frequency. However, this applies universally to all 'FAST' READ + * commands, including those used by the SPIBoot controller, and remains in + * force until the device is power-cycled. Since the SPIBoot controller is + * hard-wired to use 8 dummy cycles, we must configure the device to also use 8 + * cycles. + */ +static struct seq_rw_config n25q_read3_configs[] = { + {FLASH_FLAG_READ_1_4_4, FLASH_CMD_READ_1_4_4, 0, 4, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_4, FLASH_CMD_READ_1_1_4, 0, 1, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_2_2, FLASH_CMD_READ_1_2_2, 0, 2, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_2, FLASH_CMD_READ_1_1_2, 0, 1, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_FAST, FLASH_CMD_READ_FAST, 0, 1, 1, 0x00, 0, 8}, + {FLASH_FLAG_READ_WRITE, FLASH_CMD_READ, 0, 1, 1, 0x00, 0, 0}, + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, +}; + +/* N25Q 4-byte Address READ configurations + * - use special 4-byte address READ commands (reduces overheads, and + * reduces risk of hitting watchdog reset issues). + * - 'FAST' variants configured for 8 dummy cycles (see note above.) + */ +static struct seq_rw_config n25q_read4_configs[] = { + {FLASH_FLAG_READ_1_4_4, FLASH_CMD_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_4, FLASH_CMD_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_2_2, FLASH_CMD_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_2, FLASH_CMD_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_FAST, FLASH_CMD_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, + {FLASH_FLAG_READ_WRITE, FLASH_CMD_READ4, 0, 1, 1, 0x00, 0, 0}, + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, +}; + static struct stfsm_seq stfsm_seq_en_32bit_addr;/* Dynamically populated */ static struct stfsm_seq stfsm_seq_read_jedec = {