From patchwork Thu Jan 23 10:31:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 23590 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f71.google.com (mail-oa0-f71.google.com [209.85.219.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A776F218BD for ; Thu, 23 Jan 2014 10:32:31 +0000 (UTC) Received: by mail-oa0-f71.google.com with SMTP id g12sf6438136oah.2 for ; Thu, 23 Jan 2014 02:32:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=rkSn178NIqIvhCUydornZBCpUC3oz4ZR82fYs8AmgA0=; b=b/BMqVPmaffwp8uELxVctO6StqIJaBsHVdnfsqL0UktwNZL63gvcd5WzHv5aPCrrwq /D5EERO7UsUu9NnPL1AaYW0URpl+xSMpQ6Im86kbadDDqZWENnKSG1ab8Xslg0MB/bRc eQ5H0px5JMFuiQVQnaSx1RjQi47l67048UOH4NBDUC2OjwUoJETEVG4wKcKjaLcofxVz xmybXuAKOMK6GIvFawc5bRIlVG7vmeibH07Xf/SXxSJ/4FmiMT5UNl9cGO5lfRIFNgPI 07qmz12rBnWMlNgZAHGd8uT/TCzjd+sdPWWywrfcSjkILb9pwDRQ4EQeCzeCgZqfALyf u3yg== X-Gm-Message-State: ALoCoQm/pQkjFBmP/Z8VRXvZ6sDiRYyWXumskM/pmhrt9fCKzzVMkd3iCahj8eVIOPj4M7HMBbBH X-Received: by 10.50.18.4 with SMTP id s4mr3377224igd.5.1390473150798; Thu, 23 Jan 2014 02:32:30 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.43.4 with SMTP id d4ls298832qga.20.gmail; Thu, 23 Jan 2014 02:32:30 -0800 (PST) X-Received: by 10.220.191.134 with SMTP id dm6mr4185859vcb.16.1390473150698; Thu, 23 Jan 2014 02:32:30 -0800 (PST) Received: from mail-vb0-f46.google.com (mail-vb0-f46.google.com [209.85.212.46]) by mx.google.com with ESMTPS id a2si6429671vea.29.2014.01.23.02.32.30 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 Jan 2014 02:32:30 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.46 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.46; Received: by mail-vb0-f46.google.com with SMTP id o19so921433vbm.19 for ; Thu, 23 Jan 2014 02:32:30 -0800 (PST) X-Received: by 10.220.110.210 with SMTP id o18mr48622vcp.49.1390473150623; Thu, 23 Jan 2014 02:32:30 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp15956vcz; Thu, 23 Jan 2014 02:32:30 -0800 (PST) X-Received: by 10.194.185.237 with SMTP id ff13mr1104894wjc.64.1390473149636; Thu, 23 Jan 2014 02:32:29 -0800 (PST) Received: from mail-we0-f180.google.com (mail-we0-f180.google.com [74.125.82.180]) by mx.google.com with ESMTPS id wn9si8779606wjc.170.2014.01.23.02.32.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 Jan 2014 02:32:29 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.180 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.180; Received: by mail-we0-f180.google.com with SMTP id q59so952739wes.11 for ; Thu, 23 Jan 2014 02:32:29 -0800 (PST) X-Received: by 10.180.103.227 with SMTP id fz3mr23623270wib.29.1390473149052; Thu, 23 Jan 2014 02:32:29 -0800 (PST) Received: from localhost.localdomain ([80.76.198.141]) by mx.google.com with ESMTPSA id ay6sm21257831wjb.23.2014.01.23.02.32.26 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 Jan 2014 02:32:28 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: linus.walleij@linaro.org, dwmw2@infradead.org, linux-mtd@lists.infradead.org, computersforpeace@gmail.com, Angus.Clark@st.com, DCG_UPD_stlinux_kernel@list.st.com, olivier.clergeaud@st.com, Lee Jones Subject: [PATCH RESEND v4 19/37] mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset Date: Thu, 23 Jan 2014 10:31:07 +0000 Message-Id: <1390473085-24626-20-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1390473085-24626-1-git-send-email-lee.jones@linaro.org> References: <1390473085-24626-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.46 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Based on information we can obtain though platform specific data and/or chip capabilities we are able to determine whether or not we can handle a SoC reset or not. To find out why this is important please read the comment provided in the patch. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index fc23354..b21929b 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -246,6 +246,8 @@ struct stfsm { uint32_t fifo_dir_delay; bool booted_from_spi; + bool reset_signal; + bool reset_por; }; struct stfsm_seq { @@ -552,6 +554,40 @@ static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, } } +/* + * SoC reset on 'boot-from-spi' systems + * + * Certain modes of operation cause the Flash device to enter a particular state + * for a period of time (e.g. 'Erase Sector', 'Quad Enable', and 'Enter 32-bit + * Addr' commands). On boot-from-spi systems, it is important to consider what + * happens if a warm reset occurs during this period. The SPIBoot controller + * assumes that Flash device is in its default reset state, 24-bit address mode, + * and ready to accept commands. This can be achieved using some form of + * on-board logic/controller to force a device POR in response to a SoC-level + * reset or by making use of the device reset signal if available (limited + * number of devices only). + * + * Failure to take such precautions can cause problems following a warm reset. + * For some operations (e.g. ERASE), there is little that can be done. For + * other modes of operation (e.g. 32-bit addressing), options are often + * available that can help minimise the window in which a reset could cause a + * problem. + * + */ +static bool stfsm_can_handle_soc_reset(struct stfsm *fsm) +{ + /* Reset signal is available on the board and supported by the device */ + if (fsm->reset_signal && fsm->info->flags & FLASH_FLAG_RESET) + return true; + + /* Board-level logic forces a power-on-reset */ + if (fsm->reset_por) + return true; + + /* Reset is not properly handled and may result in failure to reboot */ + return false; +} + /* Configure 'addr_cfg' according to addressing mode */ static void stfsm_prepare_erasesec_seq(struct stfsm *fsm, struct stfsm_seq *seq) @@ -824,6 +860,10 @@ static void stfsm_fetch_platform_configs(struct platform_device *pdev) goto boot_device_fail; } + fsm->reset_signal = of_property_read_bool(np, "st,reset-signal"); + + fsm->reset_por = of_property_read_bool(np, "st,reset-por"); + /* Where in the syscon the boot device information lives */ ret = of_property_read_u32(np, "st,boot-device-reg", &boot_device_reg); if (ret)