From patchwork Wed Jan 22 14:56:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 23541 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qc0-f200.google.com (mail-qc0-f200.google.com [209.85.216.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 89DD2218CB for ; Wed, 22 Jan 2014 15:06:28 +0000 (UTC) Received: by mail-qc0-f200.google.com with SMTP id e9sf743957qcy.3 for ; Wed, 22 Jan 2014 07:06:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:content-type:content-transfer-encoding; bh=1kuo/0Y6ed/TCDGW9Xnr5k7j38JcjRNSJwvPdU0lnKQ=; b=jtmAa6G46rpmV9PzQAUTCpCtuhNNg96fWT7K23MSJ5Ig4iuyobaOSDMaEt6SvQmjAD g86pyh80l/YpL05w6IrlX+/8/GI2g6wDHW6i2Hai373Tg02KZVsvrjqc+oQXM0pwQFck TgEqSP68tpxcyMZzJceDsL/cFctZnxUxTFfoSkZNQF7KHkcsFl/L0OwKBcKfvCkDBhnN gnOmFsPWo9a8JG0gc8KSGBeeDRbWuFF8RWZbRdrw6YMyzBr8/6rvFrX5ptAHUUcJzGrl f1Tz/QQ1RCSdPIlcaXMoJh58UuDng96jLfi76cY/VSuXo70eNv8JRhvhcVWuY1OCZ3SY Wl7Q== X-Gm-Message-State: ALoCoQkDqsPMveKDqbfMFWkTB4HRcB4qzEbRlQg11um4w5H8NT4697qggxsidlJPRWTKeyimF7Pf X-Received: by 10.224.4.202 with SMTP id 10mr730805qas.7.1390403187792; Wed, 22 Jan 2014 07:06:27 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.0.106 with SMTP id 10ls80380qed.55.gmail; Wed, 22 Jan 2014 07:06:27 -0800 (PST) X-Received: by 10.58.86.230 with SMTP id s6mr1264757vez.16.1390403187653; Wed, 22 Jan 2014 07:06:27 -0800 (PST) Received: from mail-vb0-f49.google.com (mail-vb0-f49.google.com [209.85.212.49]) by mx.google.com with ESMTPS id u6si4706048vcx.22.2014.01.22.07.06.27 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 22 Jan 2014 07:06:27 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.49; Received: by mail-vb0-f49.google.com with SMTP id x14so279580vbb.8 for ; Wed, 22 Jan 2014 07:06:27 -0800 (PST) X-Received: by 10.220.147.16 with SMTP id j16mr1260544vcv.28.1390403187518; Wed, 22 Jan 2014 07:06:27 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.174.196 with SMTP id u4csp190783vcz; Wed, 22 Jan 2014 07:06:26 -0800 (PST) X-Received: by 10.194.234.65 with SMTP id uc1mr2233691wjc.39.1390403186567; Wed, 22 Jan 2014 07:06:26 -0800 (PST) Received: from casper.infradead.org (casper.infradead.org. [2001:770:15f::2]) by mx.google.com with ESMTPS id fi6si6854857wib.39.2014.01.22.07.06.26 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Jan 2014 07:06:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:770:15f::2 as permitted sender) client-ip=2001:770:15f::2; Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W5zFs-0002C4-Iy; Wed, 22 Jan 2014 14:58:12 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W5zFo-0000oj-6e; Wed, 22 Jan 2014 14:58:08 +0000 Received: from fw-tnat.austin.arm.com ([217.140.110.23] helo=collaborate-mta1.arm.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W5zFB-0000jd-OF for linux-arm-kernel@lists.infradead.org; Wed, 22 Jan 2014 14:57:31 +0000 Received: from e102391-lin.cambridge.arm.com (e102391-lin.cambridge.arm.com [10.1.209.166]) by collaborate-mta1.arm.com (Postfix) with ESMTP id BCE151401A8; Wed, 22 Jan 2014 08:56:47 -0600 (CST) From: Marc Zyngier To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Subject: [PATCH v2 05/10] ARM: KVM: force cache clean on page fault when caches are off Date: Wed, 22 Jan 2014 14:56:37 +0000 Message-Id: <1390402602-22777-6-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 1.8.3.4 In-Reply-To: <1390402602-22777-1-git-send-email-marc.zyngier@arm.com> References: <1390402602-22777-1-git-send-email-marc.zyngier@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140122_095730_003821_5C5830C1 X-CRM114-Status: GOOD ( 10.88 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.6 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Christoffer Dall X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: marc.zyngier@arm.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 In order for the guest with caches off to observe data written contained in a given page, we need to make sure that page is committed to memory, and not just hanging in the cache (as guest accesses are completely bypassing the cache until it decides to enable it). For this purpose, hook into the coherent_cache_guest_page function and flush the region if the guest SCTLR register doesn't show the MMU and caches as being enabled. Signed-off-by: Marc Zyngier Reviewed-by: Christoffer Dall --- arch/arm/include/asm/kvm_mmu.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h index cbab9ba..fa023e2 100644 --- a/arch/arm/include/asm/kvm_mmu.h +++ b/arch/arm/include/asm/kvm_mmu.h @@ -116,9 +116,14 @@ static inline void kvm_set_s2pmd_writable(pmd_t *pmd) struct kvm; +#define kvm_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l)) + static inline void coherent_cache_guest_page(struct kvm_vcpu *vcpu, hva_t hva, unsigned long size) { + if ((vcpu->arch.cp15[c1_SCTLR] & 0b101) != 0b101) + kvm_flush_dcache_to_poc((void *)hva, size); + /* * If we are going to insert an instruction page and the icache is * either VIPT or PIPT, there is a potential problem where the host @@ -139,8 +144,6 @@ static inline void coherent_cache_guest_page(struct kvm_vcpu *vcpu, hva_t hva, } } -#define kvm_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l)) - void stage2_flush_vm(struct kvm *kvm); #endif /* !__ASSEMBLY__ */