From patchwork Wed Jul 17 08:11:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 18395 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vb0-f70.google.com (mail-vb0-f70.google.com [209.85.212.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 2FE8125D87 for ; Wed, 17 Jul 2013 08:12:31 +0000 (UTC) Received: by mail-vb0-f70.google.com with SMTP id q12sf2393441vbe.5 for ; Wed, 17 Jul 2013 01:12:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-beenthere:x-forwarded-to:x-forwarded-for :delivered-to:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=3As23L64xDJaS6UFZrhff/gN896uS7P7DhQ8sVgWrf8=; b=lwzLAWxoPZWxZM27dse+6d6Rw86TerhdHQeZM335BTwxVKUJ60dSLFC/smMMFaHyF/ 1FaWHUaGQC1c1A+J/6NqNVZMmlOU1A7R+VJSbl/7fveTaVQF8TlIW9G+WsO7doSdw71F IDLDL1vkLdpgyxLDyk4UJxg26FnWp9BPfixM8qE30E0ENVNGRy253iDNLQhIO8DkgTIN 8l3fgl73THWjIVvPKHpU4x8eUI6adAeM86gMD1qWcyQmTgctlA9e8jsEvNTtypAOvGBH 6Vq7sV7ZZu1d4IKMdIYm1UTMzdRVTwiWHxsvWNv9SInTexAvtJBdudwnEfPBZ8TxoQio agUw== X-Received: by 10.236.113.197 with SMTP id a45mr3073714yhh.14.1374048750262; Wed, 17 Jul 2013 01:12:30 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.0.132 with SMTP id 4ls755594qee.90.gmail; Wed, 17 Jul 2013 01:12:30 -0700 (PDT) X-Received: by 10.58.29.111 with SMTP id j15mr1700878veh.76.1374048750085; Wed, 17 Jul 2013 01:12:30 -0700 (PDT) Received: from mail-vc0-f173.google.com (mail-vc0-f173.google.com [209.85.220.173]) by mx.google.com with ESMTPS id q1si1149904vex.5.2013.07.17.01.12.30 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Jul 2013 01:12:30 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.173; Received: by mail-vc0-f173.google.com with SMTP id ht10so1137955vcb.4 for ; Wed, 17 Jul 2013 01:12:30 -0700 (PDT) X-Received: by 10.58.154.34 with SMTP id vl2mr1733311veb.35.1374048749989; Wed, 17 Jul 2013 01:12:29 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.149.77 with SMTP id s13csp160403vcv; Wed, 17 Jul 2013 01:12:29 -0700 (PDT) X-Received: by 10.66.150.9 with SMTP id ue9mr6703085pab.88.1374048748790; Wed, 17 Jul 2013 01:12:28 -0700 (PDT) Received: from mail-pb0-f53.google.com (mail-pb0-f53.google.com [209.85.160.53]) by mx.google.com with ESMTPS id cr3si3091293pbc.350.2013.07.17.01.12.28 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Jul 2013 01:12:28 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.160.53 is neither permitted nor denied by best guess record for domain of anup.patel@linaro.org) client-ip=209.85.160.53; Received: by mail-pb0-f53.google.com with SMTP id xb12so1615361pbc.40 for ; Wed, 17 Jul 2013 01:12:28 -0700 (PDT) X-Received: by 10.66.249.135 with SMTP id yu7mr6658472pac.15.1374048748284; Wed, 17 Jul 2013 01:12:28 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id v20sm9067666paj.4.2013.07.17.01.12.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Jul 2013 01:12:27 -0700 (PDT) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Cc: linux-arm-kernel@lists.infradead.org, linaro-kernel@lists.linaro.org, patches@linaro.org, marc.zyngier@arm.com, catalin.marinas@arm.com, Anup Patel , Pranavkumar Sawargaonkar Subject: [PATCH V3] arm64: KVM: Support X-Gene guest VCPU on APM X-Gene host Date: Wed, 17 Jul 2013 13:41:58 +0530 Message-Id: <1374048718-9455-1-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQn4E2820cnLf7DBaqtTKE2kgWVWsptAyiVMkH7bvKXt5FXSM20Kr+Wc8cw1fps82aimNuZh X-Original-Sender: anup.patel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch allows us to have X-Gene guest VCPU when using KVM arm64 on APM X-Gene host. We add KVM_ARM_TARGET_XGENE_POTENZA for X-Gene Potenza compatible guest VCPU and we return KVM_ARM_TARGET_XGENE_POTENZA in kvm_target_cpu() when running on X-Gene host with Potenza core. V3: - Reduce multiple "return -EINVAL" in kvm_target_cpu() V2: - Renamed KVM_ARM_TARGET_XGENE_V8 to KVM_ARM_TARGET_XGENE_POTENZA V1: - Initial patch with target named as KVM_ARM_TARGET_XGENE_V8 Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar --- arch/arm64/include/uapi/asm/kvm.h | 3 ++- arch/arm64/kvm/guest.c | 36 ++++++++++++++++++++++------------ arch/arm64/kvm/sys_regs_generic_v8.c | 3 +++ 3 files changed, 29 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 5031f42..d9f026b 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -55,8 +55,9 @@ struct kvm_regs { #define KVM_ARM_TARGET_AEM_V8 0 #define KVM_ARM_TARGET_FOUNDATION_V8 1 #define KVM_ARM_TARGET_CORTEX_A57 2 +#define KVM_ARM_TARGET_XGENE_POTENZA 3 -#define KVM_ARM_NUM_TARGETS 3 +#define KVM_ARM_NUM_TARGETS 4 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ #define KVM_ARM_DEVICE_TYPE_SHIFT 0 diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 2c3ff67..143d179 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -207,20 +207,32 @@ int __attribute_const__ kvm_target_cpu(void) unsigned long implementor = read_cpuid_implementor(); unsigned long part_number = read_cpuid_part_number(); - if (implementor != ARM_CPU_IMP_ARM) - return -EINVAL; - - switch (part_number) { - case ARM_CPU_PART_AEM_V8: - return KVM_ARM_TARGET_AEM_V8; - case ARM_CPU_PART_FOUNDATION: - return KVM_ARM_TARGET_FOUNDATION_V8; - case ARM_CPU_PART_CORTEX_A57: - /* Currently handled by the generic backend */ - return KVM_ARM_TARGET_CORTEX_A57; + switch (implementor) { + case ARM_CPU_IMP_ARM: + switch (part_number) { + case ARM_CPU_PART_AEM_V8: + return KVM_ARM_TARGET_AEM_V8; + case ARM_CPU_PART_FOUNDATION: + return KVM_ARM_TARGET_FOUNDATION_V8; + case ARM_CPU_PART_CORTEX_A57: + return KVM_ARM_TARGET_CORTEX_A57; + default: + break; + } + break; + case ARM_CPU_IMP_APM: + switch (part_number) { + case APM_CPU_PART_POTENZA: + return KVM_ARM_TARGET_XGENE_POTENZA; + default: + break; + } + break; default: - return -EINVAL; + break; } + + return -EINVAL; } int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, diff --git a/arch/arm64/kvm/sys_regs_generic_v8.c b/arch/arm64/kvm/sys_regs_generic_v8.c index 4268ab9..8fe6f76 100644 --- a/arch/arm64/kvm/sys_regs_generic_v8.c +++ b/arch/arm64/kvm/sys_regs_generic_v8.c @@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void) &genericv8_target_table); kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57, &genericv8_target_table); + kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA, + &genericv8_target_table); + return 0; } late_initcall(sys_reg_genericv8_init);