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[86.16.136.251]) by mx.google.com with ESMTPSA id d10sm15436140wik.0.2013.06.06.05.17.57 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Jun 2013 05:17:58 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, srinidhi.kasagar@stericsson.com, Lee Jones , Mike Turquette , Ulf Hansson Subject: [PATCH 17/33] clk: ux500: Provide u8500_clk with skeleton Device Tree support Date: Thu, 6 Jun 2013 13:17:05 +0100 Message-Id: <1370521041-32318-18-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1370521041-32318-1-git-send-email-lee.jones@linaro.org> References: <1370521041-32318-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQkZmncIO7RfFlYwDgU3/qzp3W3yNHLAr/vs2ugnsappPhjHaKcdZ3l8dURp3HPSZ+ENiK+w X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::22e is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The functional components will be added on a per-clock basis. Cc: Mike Turquette Cc: Ulf Hansson Signed-off-by: Lee Jones --- drivers/clk/ux500/u8500_clk.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 0b4f35a..ef948ff 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -7,6 +7,7 @@ * License terms: GNU General Public License (GPL) version 2 */ +#include #include #include #include @@ -14,10 +15,17 @@ #include #include "clk.h" +const static struct of_device_id u8500_clk_of_match[] = { + { .compatible = "stericsson,u8500-clks", }, + { }, +}; + void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, u32 clkrst5_base, u32 clkrst6_base) { struct prcmu_fw_version *fw_version; + struct device_node *np = NULL; + struct device_node *child = NULL; const char *sgaclk_parent = NULL; struct clk *clk; @@ -522,4 +530,13 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk", clkrst6_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, "rng"); + + if (of_have_populated_dt()) + np = of_find_matching_node(NULL, u8500_clk_of_match); + if (!np) + return; + + for_each_child_of_node(np, child) { + /* Place holder for supported nodes. */ + } }