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Fri, 31 May 2013 09:20:52 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id E15524E; Fri, 31 May 2013 09:19:26 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 26E4F57; Fri, 31 May 2013 09:20:27 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 9100F24C2E5; Fri, 31 May 2013 11:20:21 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.279.5; Fri, 31 May 2013 11:20:26 +0200 From: Linus Walleij To: Cc: Arnd Bergmann , Linus Walleij Subject: [PATCH 18/39] ARM: u300: add SPI PL022 to the device tree Date: Fri, 31 May 2013 11:18:53 +0200 Message-ID: <1369991954-17406-19-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1369991954-17406-1-git-send-email-linus.walleij@stericsson.com> References: <1369991954-17406-1-git-send-email-linus.walleij@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlTkOccwArMBB5wb9NIqLU+u3HNjAsNcfljzMStBnLuuTQz5UB+zlZQc8P8TKtzjSgkyL8m X-Original-Sender: linus.walleij@stericsson.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::22a is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Linus Walleij This registers the PL022 PrimeCell from the U300 device tree. We make a new copy of the platform data for the device tree boot path, as the old platform data is in an older file which will be going away. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Add DMA channels. --- arch/arm/boot/dts/ste-u300.dts | 12 ++++++++++++ arch/arm/mach-u300/core.c | 19 +++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts index 4dc9f26..355ac60 100644 --- a/arch/arm/boot/dts/ste-u300.dts +++ b/arch/arm/boot/dts/ste-u300.dts @@ -222,5 +222,17 @@ dmas = <&dmac 14>; dma-names = "rx"; }; + + spi: ssp@c0006000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0xc0006000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <23>; + dmas = <&dmac 27 &dmac 28>; + dma-names = "tx", "rx"; + num-cs = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 7866f54..d102cb5 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -704,6 +705,22 @@ MACHINE_END #ifdef CONFIG_OF +static struct pl022_ssp_controller spi_plat_data = { + /* If you have several SPI buses this varies, we have only bus 0 */ + .bus_id = 0, + /* + * On the APP CPU GPIO 4, 5 and 6 are connected as generic + * chip selects for SPI. (Same on U330, U335 and U365.) + * TODO: make sure the GPIO driver can select these properly + * and do padmuxing accordingly too. + */ + .num_chipselect = 3, + .enable_dma = 1, + .dma_filter = coh901318_filter_id, + .dma_rx_param = (void *) U300_DMA_SPI_RX, + .dma_tx_param = (void *) U300_DMA_SPI_TX, +}; + /* These are mostly to get the right device names for the clock lookups */ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("stericsson,pinctrl-u300", U300_SYSCON_BASE, @@ -720,6 +737,8 @@ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { "uart0", &uart0_plat_data), OF_DEV_AUXDATA("arm,primecell", U300_UART1_BASE, "uart1", &uart1_plat_data), + OF_DEV_AUXDATA("arm,primecell", U300_SPI_BASE, + "pl022", &spi_plat_data), OF_DEV_AUXDATA("st,ddci2c", U300_I2C0_BASE, "stu300.0", NULL), OF_DEV_AUXDATA("st,ddci2c", U300_I2C1_BASE,