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[194.47.250.12]) by mx.google.com with ESMTPS id a6si3107239lbz.228.2013.04.12.10.55.57 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 12 Apr 2013 10:55:58 -0700 (PDT) Received-SPF: pass (google.com: domain of triad@df.lth.se designates 194.47.250.12 as permitted sender) client-ip=194.47.250.12; Received: from mer.df.lth.se (mer.df.lth.se [194.47.250.37]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.df.lth.se (Postfix) with ESMTPS id 43BE265D4E; Fri, 12 Apr 2013 19:55:57 +0200 (CEST) Received: from mer.df.lth.se (triad@localhost.localdomain [127.0.0.1]) by mer.df.lth.se (8.14.3/8.14.3/Debian-9.4) with ESMTP id r3CHtutj008162; Fri, 12 Apr 2013 19:55:56 +0200 Received: (from triad@localhost) by mer.df.lth.se (8.14.3/8.14.3/Submit) id r3CHtuj7008161; Fri, 12 Apr 2013 19:55:56 +0200 From: Linus Walleij To: linux-arm-kernel@lists.infradead.org Cc: Linus Walleij Subject: [PATCH 11/11 v2] ARM: integrator: get PCI device IRQs from device tree Date: Fri, 12 Apr 2013 19:55:52 +0200 Message-Id: <1365789352-8134-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQkPVnLuyzIIX4aKbn38yFaTvnFUDcd57DL1X4yzl/TxJK7UaBip2H2ce9y/m2GQZQEZNDuv X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This adds the interrupt-map property to the PCIv3 DTS file and makes the bridge obtain mappings from the device tree. Acked-by: Arnd Bergmann Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Uses the new pci_common_init_dev() call so it actually works now, removed RFC mark. --- arch/arm/boot/dts/integratorap.dts | 24 ++++++++++++++++++++++++ arch/arm/mach-integrator/pci_v3.c | 23 ++++++++++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts index 9c78130..03f23b7 100644 --- a/arch/arm/boot/dts/integratorap.dts +++ b/arch/arm/boot/dts/integratorap.dts @@ -41,6 +41,7 @@ pci: pciv3@62000000 { compatible = "v3,v360epc-pci"; + #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; reg = <0x62000000 0x10000>; @@ -54,6 +55,29 @@ 0x40000000 0 0x10000000 /* 256 MiB @ 40000000 */ 0x42000000 0 0x50000000 /* prefetchable memory */ 0x50000000 0 0x10000000>; /* 256 MiB @ 50000000 */ + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = < + /* IDSEL 9 */ + 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */ + 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */ + 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */ + 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */ + /* IDSEL 10 */ + 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */ + 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */ + 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */ + 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */ + /* IDSEL 11 */ + 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */ + 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */ + 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */ + 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */ + /* IDSEL 12 */ + 0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */ + 0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */ + 0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */ + 0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */ + >; }; fpga { diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 8932eb3..020048a 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include