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[194.47.250.12]) by mx.google.com with ESMTPS id sk2si3106080lbb.133.2013.04.12.10.45.52 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 12 Apr 2013 10:45:53 -0700 (PDT) Received-SPF: pass (google.com: domain of triad@df.lth.se designates 194.47.250.12 as permitted sender) client-ip=194.47.250.12; Received: from mer.df.lth.se (mer.df.lth.se [194.47.250.37]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.df.lth.se (Postfix) with ESMTPS id D9B3365D3E; Fri, 12 Apr 2013 19:45:51 +0200 (CEST) Received: from mer.df.lth.se (triad@localhost.localdomain [127.0.0.1]) by mer.df.lth.se (8.14.3/8.14.3/Debian-9.4) with ESMTP id r3CHjpG1007936; Fri, 12 Apr 2013 19:45:51 +0200 Received: (from triad@localhost) by mer.df.lth.se (8.14.3/8.14.3/Submit) id r3CHjpwp007935; Fri, 12 Apr 2013 19:45:51 +0200 From: Linus Walleij To: linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Mike Rapoport , Russell King , Ralf Baechle , Thierry Reding , Andrew Murray , Arnd Bergmann , Benjamin Herrenschmitt Subject: [PATCH v3] ARM: pci: create pci_common_init_dev() Date: Fri, 12 Apr 2013 19:45:48 +0200 Message-Id: <1365788748-7908-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQlTyxdk9phaEaWTmvlCheN5S4yVFU2AdPSDWrhks+xTpC+NnXy6/oNM8qGfOPRbGwMF6lLd X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , When working with device tree support for PCI on ARM you run into a problem when mapping IRQs from the device tree irqmaps: doing this the code in drivers/of/of_pci_irq.c will try to find the OF node on the root bridge and this fails, because bus->dev.of_node is NULL, and that in turn boils down to the fact that pci_set_bus_of_node() has called pcibios_get_phb_of_node() from drivers/pci/of.c to obtain the OF node of the bridge or its parent and none is set and thus NULL is returned. Fix this by adding an additional parent argument API for registering PCI bridges on the ARM architecture called pci_common_init_dev(), and pass along this parent to pci_scan_root_bus() called from pcibios_init_hw() in bios32.c and voila: the IRQ mappings start working: the OF node can be retrieved from the parent. Create the old pci_common_init() as a wrapper around the new call. Cc: Mike Rapoport Cc: Russell King Cc: Ralf Baechle Cc: Thierry Reding Cc: Andrew Murray Cc: Arnd Bergmann Cc: Benjamin Herrenschmitt Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Actually commit all changes to make the thing compile :-( ChangeLog v1->v2: - Create a new call pci_common_init_dev() for passing a parent, create a static inline wrapper around this for compatibility with older platforms. --- arch/arm/include/asm/mach/pci.h | 11 ++++++++++- arch/arm/kernel/bios32.c | 9 +++++---- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index 5cf2e97..f93ef3f 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h @@ -16,6 +16,7 @@ struct pci_sys_data; struct pci_ops; struct pci_bus; +struct device; struct hw_pci { #ifdef CONFIG_PCI_DOMAINS @@ -57,7 +58,15 @@ struct pci_sys_data { /* * Call this with your hw_pci struct to initialise the PCI system. */ -void pci_common_init(struct hw_pci *); +void pci_common_init_dev(struct device *, struct hw_pci *); + +/* + * Compatibility wrapper for older platforms that do not care about + * passing the parent device. + */ +static inline void pci_common_init(struct hw_pci *hw) { + pci_common_init_dev(NULL, hw); +} /* * Setup early fixed I/O mapping. diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index a1f73b5..a99bde1 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -445,7 +445,8 @@ static int pcibios_init_resources(int busnr, struct pci_sys_data *sys) return 0; } -static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head) +static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, + struct list_head *head) { struct pci_sys_data *sys = NULL; int ret; @@ -479,7 +480,7 @@ static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head) if (hw->scan) sys->bus = hw->scan(nr, sys); else - sys->bus = pci_scan_root_bus(NULL, sys->busnr, + sys->bus = pci_scan_root_bus(parent, sys->busnr, hw->ops, sys, &sys->resources); if (!sys->bus) @@ -496,7 +497,7 @@ static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head) } } -void pci_common_init(struct hw_pci *hw) +void pci_common_init_dev(struct device *parent, struct hw_pci *hw) { struct pci_sys_data *sys; LIST_HEAD(head); @@ -504,7 +505,7 @@ void pci_common_init(struct hw_pci *hw) pci_add_flags(PCI_REASSIGN_ALL_RSRC); if (hw->preinit) hw->preinit(); - pcibios_init_hw(hw, &head); + pcibios_init_hw(parent, hw, &head); if (hw->postinit) hw->postinit();