From patchwork Thu Mar 21 11:49:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 15460 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3E29223E10 for ; Thu, 21 Mar 2013 11:50:04 +0000 (UTC) Received: from mail-vc0-f175.google.com (mail-vc0-f175.google.com [209.85.220.175]) by fiordland.canonical.com (Postfix) with ESMTP id C3AD8A1996C for ; Thu, 21 Mar 2013 11:50:03 +0000 (UTC) Received: by mail-vc0-f175.google.com with SMTP id hf12so2159751vcb.6 for ; Thu, 21 Mar 2013 04:50:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type:x-gm-message-state; bh=XYu+g+qlNenDyI2YMSMmvi8hcjoMerz8zNMnjTug1sQ=; b=XKEJEn4zGnt8iYD3mW62sn7S3RdmrGrBQUbHf1mlctQbluB1m4U3a2NimJWc0sHnR5 1knB6cMo5lx+m3PhPQ5AanvtK4LutLFItFq+kQDHFBuo9iuizW+8GCVou/PPQ9wZXYXx WAiwDumqy+iA6i3gp6QbHsGUChWNVQV4Y5bEKh0vIAi4Ugp137lJUs4NxJ4OE2WlMYLo NExBlN4etDnZllWcxRUyHVBU8Bn5IBGj8n6syeNjdBnzm6rW7OPpIrdmPoy6RqSOkOtt L6zNjUN8ks3cg6tjHsdzr9s3WTtzIKyBmVMhw7pfBm7lFkYUBemiVspxeJseInnDc504 Qyxg== X-Received: by 10.52.93.20 with SMTP id cq20mr11019233vdb.38.1363866603309; Thu, 21 Mar 2013 04:50:03 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.233.198 with SMTP id ty6csp56564vec; Thu, 21 Mar 2013 04:50:02 -0700 (PDT) X-Received: by 10.194.235.196 with SMTP id uo4mr16577962wjc.30.1363866601903; Thu, 21 Mar 2013 04:50:01 -0700 (PDT) Received: from eu1sys200aog104.obsmtp.com (eu1sys200aog104.obsmtp.com [207.126.144.117]) by mx.google.com with SMTP id t43si8308083eeg.108.2013.03.21.04.49.53 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 21 Mar 2013 04:50:01 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.117 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.117; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.117 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob104.postini.com ([207.126.147.11]) with SMTP ID DSNKUUrz30JWFfTWuwkllh/RLVNk0aCKeE7D@postini.com; Thu, 21 Mar 2013 11:50:01 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 8EA8DA6; Thu, 21 Mar 2013 11:41:33 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A779C2B6; Thu, 21 Mar 2013 11:49:41 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 5B85DA8065; Thu, 21 Mar 2013 12:49:36 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.279.5; Thu, 21 Mar 2013 12:49:40 +0100 From: Linus Walleij To: , Arnd Bergmann Cc: Linus Walleij , Suman Anna , Loic Pallardy , Samuel Ortiz Subject: [PATCH 3/6] mfd: prcmu: pass a base and size with the early initcall Date: Thu, 21 Mar 2013 12:49:10 +0100 Message-ID: <1363866553-15054-4-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1363866553-15054-1-git-send-email-linus.walleij@stericsson.com> References: <1363866553-15054-1-git-send-email-linus.walleij@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmjQEpPyWvF+EkqRSvrOgIT7wzlauMFFjt+PwCAUM2glqanMIanM1aFnmX1qlUNWexufE+z From: Linus Walleij This patch will make an early remapping of the PRCMU, to be used when setting up the clocks, that will call down into parts of the PRCMU driver before it is probed. Going forward this will be removed like this: - The mailbox subsystem need to be merged. http://marc.info/?l=linux-kernel&m=136314559201983&w=2 - At this point the PRCMU clock code can be moved over to the ux500 clock driver in drivers/clk/ux500/* and maintained there in a decentralized manner. - This early initcall and PRCMU base parameters become part of the ux500_clk_init() call instead. Cc: Suman Anna Cc: Loic Pallardy Cc: Samuel Ortiz Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/cpu.c | 17 +++++++++++------ drivers/mfd/db8500-prcmu.c | 13 ++++++++++++- include/linux/mfd/db8500-prcmu.h | 4 ++-- include/linux/mfd/dbx500-prcmu.h | 6 +++--- 4 files changed, 28 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 741d06a..af13b6d 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include @@ -68,15 +68,20 @@ void __init ux500_init_irq(void) * Init clocks here so that they are available for system timer * initialization. */ - if (cpu_is_u8500_family() || cpu_is_u9540()) - db8500_prcmu_early_init(); - - if (cpu_is_u8500_family() || cpu_is_u9540()) + if (cpu_is_u8500_family()) { + prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, U8500_CLKRST6_BASE); - else if (cpu_is_u8540()) + } else if (cpu_is_u9540()) { + prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); + u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, + U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, + U8500_CLKRST6_BASE); + } else if (cpu_is_u8540()) { + prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); u8540_clk_init(); + } } void __init ux500_init_late(void) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 21f261b..9166427 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2825,8 +2825,19 @@ static void dbx500_fw_version_init(struct platform_device *pdev, } } -void __init db8500_prcmu_early_init(void) +void __init db8500_prcmu_early_init(u32 phy_base, u32 size) { + /* + * This is a temporary remap to bring up the clocks. It is + * subsequently replaces with a real remap. After the merge of + * the mailbox subsystem all of this early code goes away, and the + * clock driver can probe independently. An early initcall will + * still be needed, but it can be diverted into drivers/clk/ux500/*. + */ + prcmu_base = ioremap(phy_base, size); + if (!prcmu_base) + pr_err("%s: ioremap() of prcmu registers failed!\n", __func__); + spin_lock_init(&mb0_transfer.lock); spin_lock_init(&mb0_transfer.dbb_irqs_lock); mutex_init(&mb0_transfer.ac_wake_lock); diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 77a46ae..ac943df 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -489,7 +489,7 @@ struct prcmu_auto_pm_config { #ifdef CONFIG_MFD_DB8500_PRCMU -void db8500_prcmu_early_init(void); +void db8500_prcmu_early_init(u32 phy_base, u32 size); int prcmu_set_rc_a2p(enum romcode_write); enum romcode_read prcmu_get_rc_p2a(void); enum ap_pwrst prcmu_get_xp70_current_state(void); @@ -553,7 +553,7 @@ void db8500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value); #else /* !CONFIG_MFD_DB8500_PRCMU */ -static inline void db8500_prcmu_early_init(void) {} +static inline void db8500_prcmu_early_init(u32 phy_base, u32 size) {} static inline int prcmu_set_rc_a2p(enum romcode_write code) { diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index 3abcca9..8c546cb 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -276,9 +276,9 @@ struct prcmu_fw_version { #if defined(CONFIG_UX500_SOC_DB8500) -static inline void __init prcmu_early_init(void) +static inline void prcmu_early_init(u32 phy_base, u32 size) { - return db8500_prcmu_early_init(); + return db8500_prcmu_early_init(phy_base, size); } static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, @@ -500,7 +500,7 @@ static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off) } #else -static inline void __init prcmu_early_init(void) {} +static inline void prcmu_early_init(u32 phy_base, u32 size) {} static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll)