From patchwork Tue Feb 19 16:22:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 14995 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 6694923E24 for ; Tue, 19 Feb 2013 16:23:21 +0000 (UTC) Received: from mail-vb0-f41.google.com (mail-vb0-f41.google.com [209.85.212.41]) by fiordland.canonical.com (Postfix) with ESMTP id 1A9CAA187A2 for ; Tue, 19 Feb 2013 16:23:21 +0000 (UTC) Received: by mail-vb0-f41.google.com with SMTP id l22so4441849vbn.0 for ; Tue, 19 Feb 2013 08:23:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=aQkFgc76nInQ4HYSPuCDExKBm4Y7r6CPrU1pkQs/KUQ=; b=Y0ySl2g5U869P8ffMR0CuOgY2rlTKtmZJsbPqBftdGmXLmn9/Ub2oTtbEHWaO+lPK2 pTMzp1boJWDqtaSUOFEM9PXWsuIC4Q9Wl5Fp+/Art2HWEptH/cf6SO8gpnPn4d0Cz6p3 bGjsdGMn4NU1z2VZ7JyTgegpDFxrU1w3IJO0RZsdMCqRpywfI9HlJLq+zAD31P6qSUIr c/UYfG/p9QweuuJf5G1eau849IF7GRcjLNM4oXK0UxBrBozBH9LQQ+h8aVzBkr+WtU/7 xtxWQe4t+sR4fiU6dcWTQXmkaBhTYJj4FpkcuvQ1qCHJpo1iSnYgx29ITJygEr+b+uIb +6JQ== X-Received: by 10.58.247.132 with SMTP id ye4mr22172623vec.9.1361291000446; Tue, 19 Feb 2013 08:23:20 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp150706veb; Tue, 19 Feb 2013 08:23:19 -0800 (PST) X-Received: by 10.68.137.7 with SMTP id qe7mr601103pbb.141.1361290999453; Tue, 19 Feb 2013 08:23:19 -0800 (PST) Received: from mail-pb0-f46.google.com (mail-pb0-f46.google.com [209.85.160.46]) by mx.google.com with ESMTPS id t10si24573344pay.302.2013.02.19.08.23.19 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 19 Feb 2013 08:23:19 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.46 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) client-ip=209.85.160.46; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.46 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) smtp.mail=haojian.zhuang@linaro.org Received: by mail-pb0-f46.google.com with SMTP id uo15so2313771pbc.19 for ; Tue, 19 Feb 2013 08:23:19 -0800 (PST) X-Received: by 10.68.137.42 with SMTP id qf10mr10011185pbb.80.1361290999028; Tue, 19 Feb 2013 08:23:19 -0800 (PST) Received: from localhost.localdomain ([27.115.121.39]) by mx.google.com with ESMTPS id rn14sm18472714pbb.33.2013.02.19.08.23.13 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 19 Feb 2013 08:23:18 -0800 (PST) From: Haojian Zhuang To: grinberg@compulab.co.il, linus.walleij@linaro.org, linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, grant.likely@secretlab.ca, cxie4@marvell.com Cc: patches@linaro.org, Haojian Zhuang Subject: [PATCH v4 07/11] document: devicetree: add properties in mrvl gpio Date: Wed, 20 Feb 2013 00:22:24 +0800 Message-Id: <1361290948-16669-8-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1361290948-16669-1-git-send-email-haojian.zhuang@linaro.org> References: <1361290948-16669-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQnhLn0LWbXskHYxZMp89aKoQW1ykkhJ+d4P7aIxyeLYRoTbpHcO58HbhLMHAMafZOpoRkwG Append new properties for mrvl gpio. They're in below. marvell,gpio-ed-mask marvell,gpio-inverted & marvell,nr_gpios. Signed-off-by: Haojian Zhuang --- Documentation/devicetree/bindings/gpio/mrvl-gpio.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt index e137874..8cd5252 100644 --- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt @@ -14,6 +14,13 @@ Required properties: interrupt source. - gpio-controller : Marks the device node as a gpio controller. - #gpio-cells : Should be one. It is the pin number. +- marvell,nr-gpios : Should be the number of total gpio pins. + +Optional properties: +- marvell,gpio-ed-mask : It means that there's gpio edge mask register. + It only exists in mmp family SoC. +- marvell,gpio-inverted : It means that some gpio pins are inverted. + It only exists in PXA26x SoC. Example: @@ -26,6 +33,8 @@ Example: #gpio-cells = <1>; interrupt-controller; #interrupt-cells = <1>; + marvell,gpio-ed-mask; + marvell,nr-gpios = <128>; }; * Marvell Orion GPIO Controller