From patchwork Sat Feb 2 17:25:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 14425 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D48D023F96 for ; Sat, 2 Feb 2013 17:26:46 +0000 (UTC) Received: from mail-ve0-f171.google.com (mail-ve0-f171.google.com [209.85.128.171]) by fiordland.canonical.com (Postfix) with ESMTP id 92677A18DCE for ; Sat, 2 Feb 2013 17:26:46 +0000 (UTC) Received: by mail-ve0-f171.google.com with SMTP id b10so3684424vea.16 for ; Sat, 02 Feb 2013 09:26:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=PTXn85+yhh7XkHPLlhL/W3Zdjmrc7p3qwnYh5PVrplQ=; b=LTFoB3+PcK0ShtLANVe6HHUwOpX+fXFYtMibzQnTsvzV8zb6nGdbatVdiq1zir54UW wzU7TcPvsPsD68yuFI8SXkrqErz93iZ7AAxOXC5KVSnvmf7Jece1eInWQIEb4NK9+Kw1 GHXLrL+CxoDcqcPCz8GLvTdIC6vKOpq36sqqNyg5K1xpZlDk1wpSmRYKIXbYkRG7jdnT V93kMLpz4BjYiJ3E+YWMe93lao0n7Be7d5Rd9rXfQ54+1QNgQlNumxvfNigqnAg8hYGU xU9+Gf5uinkNEJFctiWZ8KfyJPJGWRnEEU6zS01aHBpNC1AO4ocCMN5UiXUQzQqkHr5Q NE2w== X-Received: by 10.52.66.168 with SMTP id g8mr13415245vdt.27.1359826006104; Sat, 02 Feb 2013 09:26:46 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp16825vec; Sat, 2 Feb 2013 09:26:45 -0800 (PST) X-Received: by 10.68.197.9 with SMTP id iq9mr41579349pbc.130.1359826005307; Sat, 02 Feb 2013 09:26:45 -0800 (PST) Received: from mail-pa0-f52.google.com (mail-pa0-f52.google.com [209.85.220.52]) by mx.google.com with ESMTPS id vy7si11272635pbc.156.2013.02.02.09.26.45 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 02 Feb 2013 09:26:45 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.52 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) client-ip=209.85.220.52; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.52 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) smtp.mail=haojian.zhuang@linaro.org Received: by mail-pa0-f52.google.com with SMTP id fb1so1300223pad.39 for ; Sat, 02 Feb 2013 09:26:44 -0800 (PST) X-Received: by 10.66.76.42 with SMTP id h10mr39225520paw.59.1359826004857; Sat, 02 Feb 2013 09:26:44 -0800 (PST) Received: from localhost.localdomain ([27.115.121.35]) by mx.google.com with ESMTPS id b3sm10434040pax.14.2013.02.02.09.26.38 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 02 Feb 2013 09:26:44 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Cc: patches@linaro.org, Haojian Zhuang Subject: [PATCH v8 06/12] gpio: pl061: bind pinctrl by gpio request Date: Sun, 3 Feb 2013 01:25:47 +0800 Message-Id: <1359825953-15663-7-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> References: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQl09vsROu+8jyXFGIbepW8YHzpxykf/Nk0EbsFlB1XRm+U0PLKQ9SdOnQIinLX0jy8MTw/h Add the pl061_gpio_request() to request pinctrl. Create the logic between pl061 gpio driver and pinctrl (pinctrl-single) driver. While a gpio pin is requested, it will request pinctrl driver to set that pin with gpio function mode. So pinctrl driver should append .gpio_request_enable() in pinmux_ops. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpio-pl061.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index fd26f63..292620c 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,17 @@ struct pl061_gpio { #endif }; +static int pl061_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + /* + * Map back to global GPIO space and request muxing, the direction + * parameter does not matter for this controller. + */ + int gpio = chip->base + offset; + + return pinctrl_request_gpio(gpio); +} + static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); @@ -251,6 +263,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) spin_lock_init(&chip->lock); + chip->gc.request = pl061_gpio_request; chip->gc.direction_input = pl061_direction_input; chip->gc.direction_output = pl061_direction_output; chip->gc.get = pl061_get_value;