From patchwork Mon Jan 7 11:21:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Baltieri X-Patchwork-Id: 13864 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 9159923EC8 for ; Mon, 7 Jan 2013 11:23:17 +0000 (UTC) Received: from mail-vc0-f178.google.com (mail-vc0-f178.google.com [209.85.220.178]) by fiordland.canonical.com (Postfix) with ESMTP id 63220A1937E for ; Mon, 7 Jan 2013 11:23:17 +0000 (UTC) Received: by mail-vc0-f178.google.com with SMTP id l6so5417701vcl.9 for ; Mon, 07 Jan 2013 03:23:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=sd4E13P6XwGP/u5kosoqzF0mpbddS3k2ucFsUjX9Z90=; b=UpG9l2Hd6WCL/P/i+1P3I/jV1z0QvpOpamJfZBOewx6f0gJBs2hdntKBKQuhPry3ez qGGzankqiJZDFZZV5aggUfVdJjMFGzBf6q5yjspeZGr9s3UqiV6qJEsgX9xC6Cr2SFC1 jWuKtxwhWYs9jBU4sO3bYpD6RRUYnW5yECFg5Vra0qtFWl4ltphmHAv0pd/BF6r+fO+H v9IDhHry+mY0GO66jXC22cS5YRVfahnZ6x6z+QY9E6CiOojvayRzv33dX0JReE8XSMdd 6kgByV0OJ5VTOTmgAcWCBo6FvzAtDC8RPIQWwNs1O+62WKpuUctoSZMI11x4+v4hXvrs vHXQ== X-Received: by 10.58.74.196 with SMTP id w4mr5683161vev.7.1357557796866; Mon, 07 Jan 2013 03:23:16 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp56206veb; Mon, 7 Jan 2013 03:23:15 -0800 (PST) X-Received: by 10.194.235.6 with SMTP id ui6mr95661867wjc.12.1357557795171; Mon, 07 Jan 2013 03:23:15 -0800 (PST) Received: from mail-we0-f182.google.com (mail-we0-f182.google.com [74.125.82.182]) by mx.google.com with ESMTPS id em9si10021449wid.32.2013.01.07.03.23.14 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 07 Jan 2013 03:23:15 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.182 is neither permitted nor denied by best guess record for domain of fabio.baltieri@linaro.org) client-ip=74.125.82.182; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.182 is neither permitted nor denied by best guess record for domain of fabio.baltieri@linaro.org) smtp.mail=fabio.baltieri@linaro.org Received: by mail-we0-f182.google.com with SMTP id u54so9801695wey.41 for ; Mon, 07 Jan 2013 03:23:14 -0800 (PST) X-Received: by 10.180.33.202 with SMTP id t10mr8789432wii.3.1357557794781; Mon, 07 Jan 2013 03:23:14 -0800 (PST) Received: from localhost ([2a01:2029:1:11e3:8e70:5aff:feac:ad8]) by mx.google.com with ESMTPS id s16sm12134962wii.0.2013.01.07.03.23.08 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 07 Jan 2013 03:23:13 -0800 (PST) From: Fabio Baltieri To: Vinod Koul Cc: Dan Williams , Linus Walleij , Srinidhi Kasagar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Narayanan , Fabio Baltieri Subject: [PATCH 01/16] dmaengine: ste_dma40: reset priority bit for logical channels Date: Mon, 7 Jan 2013 12:21:43 +0100 Message-Id: <1357557718-15676-2-git-send-email-fabio.baltieri@linaro.org> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <1357557718-15676-1-git-send-email-fabio.baltieri@linaro.org> References: <1357557718-15676-1-git-send-email-fabio.baltieri@linaro.org> X-Gm-Message-State: ALoCoQmIKtQZrU9r1yI3RduTluNeKRTUL3FnaT4YyIzyhE2oY44a33+nXsWAzaObEXDcw3ZsLHsv From: Narayanan This patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel requests with high priority. For logical channels, this bit will be zero. Signed-off-by: Narayanan G Reviewed-by: Rabin Vincent Acked-by: Linus Walleij Signed-off-by: Fabio Baltieri --- drivers/dma/ste_dma40_ll.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index 851ad56..d64b72a 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -102,17 +102,18 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, src |= cfg->src_info.data_width << D40_SREG_CFG_ESIZE_POS; dst |= cfg->dst_info.data_width << D40_SREG_CFG_ESIZE_POS; + /* Set the priority bit to high for the physical channel */ + if (cfg->high_priority) { + src |= 1 << D40_SREG_CFG_PRI_POS; + dst |= 1 << D40_SREG_CFG_PRI_POS; + } + } else { /* Logical channel */ dst |= 1 << D40_SREG_CFG_LOG_GIM_POS; src |= 1 << D40_SREG_CFG_LOG_GIM_POS; } - if (cfg->high_priority) { - src |= 1 << D40_SREG_CFG_PRI_POS; - dst |= 1 << D40_SREG_CFG_PRI_POS; - } - if (cfg->src_info.big_endian) src |= 1 << D40_SREG_CFG_LBE_POS; if (cfg->dst_info.big_endian)