From patchwork Tue Nov 6 13:15:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 12684 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 1AF9A23E00 for ; Tue, 6 Nov 2012 13:15:37 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 9C0B6A19BE2 for ; Tue, 6 Nov 2012 13:15:36 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so490732iej.11 for ; Tue, 06 Nov 2012 05:15:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=C3sGFUKLSOFZWRXhyybMfSsrGsQj2svLT3oEH7hxk54=; b=fUc8PCap2lzR5CJfw2hSJ/cJAbyTyYnHyTT+1INCCZPUId+TzkDQY6kuizKBJfPGRT mVct2eut1uiiIIzBHdJIspgUcPYLf/zp5opgz3tC++9urp1Opgz4hpeSzVCSBfyPQLFJ 9UXcWHIMdEiOKr8ymebuwqbQKPIBRyQhE55Fl+rOgOQtP/OL0We2ycftKCAamgjXhxiE I7gQZHbrjg6rbPnA6m9Ecg36LXd9Epun3cTyoE8ETz2gBna2nW8XkyFfARo9NUHOYrgt Ngde4aQG7Ni/+LBFeXKDV8A37fHQI64f9VJVLaUX06kvuCQl/mQIJwfaVBYZ0AzQG8dL apXg== Received: by 10.50.40.166 with SMTP id y6mr842135igk.57.1352207736366; Tue, 06 Nov 2012 05:15:36 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp39705igt; Tue, 6 Nov 2012 05:15:35 -0800 (PST) Received: by 10.14.175.71 with SMTP id y47mr3375742eel.36.1352207735304; Tue, 06 Nov 2012 05:15:35 -0800 (PST) Received: from eu1sys200aog116.obsmtp.com (eu1sys200aog116.obsmtp.com [207.126.144.141]) by mx.google.com with SMTP id k8si14459155eed.84.2012.11.06.05.15.32 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Nov 2012 05:15:35 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.141 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.141; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.141 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob116.postini.com ([207.126.147.11]) with SMTP ID DSNKUJkNdNV8A5ZBVQTLv1lxll8v/i5nACyW@postini.com; Tue, 06 Nov 2012 13:15:35 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1767D29A; Tue, 6 Nov 2012 13:15:31 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A73C948D5; Tue, 6 Nov 2012 13:15:31 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 410DAA8072; Tue, 6 Nov 2012 14:15:26 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 6 Nov 2012 14:15:30 +0100 From: Linus Walleij To: Cc: Anmar Oueja , Patrice Chotard , Linus Walleij Subject: [PATCH 4/9] ARM: ux500: 8500: update SKE keypad pinctrl table Date: Tue, 6 Nov 2012 14:15:28 +0100 Message-ID: <1352207728-7918-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQnpDMkKYJE6V6rc7JUIU3cZ0mkAgryfGr6YG2V00L37XDR5hWBMvykhvZ1DNaW7GhJJlPZ8 From: Patrice Chotard The old pinctrl table for the SKE keypad was using all the wrong settings and positions. Fixing it up to one that works! Signed-off-by: Patrice Chotard nn Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500-pins.c | 141 +++++++++++++++++++++----------- 1 file changed, 92 insertions(+), 49 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 7c784f5..446cbc0 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -34,8 +34,6 @@ BIAS(in_nopull, PIN_INPUT_NOPULL); BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE); BIAS(in_pu, PIN_INPUT_PULLUP); BIAS(in_pd, PIN_INPUT_PULLDOWN); -BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP); -BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW); BIAS(out_hi, PIN_OUTPUT_HIGH); BIAS(out_lo, PIN_OUTPUT_LOW); BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE); @@ -47,14 +45,26 @@ BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SL BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); /* Sleep modes */ -BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE); -BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); -BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE); +BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); +BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED| + PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP| + PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED); /* We use these to define hog settings that are always done on boot */ #define DB8500_MUX_HOG(group,func) \ @@ -250,6 +260,42 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = { DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */ DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */ DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */ + + /* ske default state */ + DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"), + DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */ + DB8500_PIN("GPIO154_C16", in_pd, "nmk-ske-keypad"), /* I6 */ + DB8500_PIN("GPIO155_C19", in_pd, "nmk-ske-keypad"), /* I5 */ + DB8500_PIN("GPIO156_C17", in_pd, "nmk-ske-keypad"), /* I4 */ + DB8500_PIN("GPIO161_D21", in_pd, "nmk-ske-keypad"), /* I3 */ + DB8500_PIN("GPIO162_D20", in_pd, "nmk-ske-keypad"), /* I2 */ + DB8500_PIN("GPIO163_C20", in_pd, "nmk-ske-keypad"), /* I1 */ + DB8500_PIN("GPIO164_B21", in_pd, "nmk-ske-keypad"), /* I0 */ + DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */ + DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */ + DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */ + DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */ + DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */ + DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */ + DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */ + DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */ + /* ske sleep state */ + DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */ + DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */ + DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */ + DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */ + DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */ + DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */ + DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */ + DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */ + DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */ + DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */ + DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */ + DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */ + DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */ + DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */ + DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */ + DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */ }; /* @@ -284,23 +330,42 @@ static struct pinctrl_map __initdata mop500_pinmap[] = { * Runtime stuff: make it possible to mux in the SKE keypad * and bias the pins */ - DB8500_MUX("kp_a_2", "kp", "ske"), - DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */ - DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */ - DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */ - DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */ - DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */ - DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */ - DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */ - DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */ - DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */ - DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */ - DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */ - DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */ - DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */ - DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */ - DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */ - DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */ + /* ske default state */ + DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"), + DB8500_PIN("GPIO153_B17", in_pu, "nmk-ske-keypad"), /* I7 */ + DB8500_PIN("GPIO154_C16", in_pu, "nmk-ske-keypad"), /* I6 */ + DB8500_PIN("GPIO155_C19", in_pu, "nmk-ske-keypad"), /* I5 */ + DB8500_PIN("GPIO156_C17", in_pu, "nmk-ske-keypad"), /* I4 */ + DB8500_PIN("GPIO161_D21", in_pu, "nmk-ske-keypad"), /* I3 */ + DB8500_PIN("GPIO162_D20", in_pu, "nmk-ske-keypad"), /* I2 */ + DB8500_PIN("GPIO163_C20", in_pu, "nmk-ske-keypad"), /* I1 */ + DB8500_PIN("GPIO164_B21", in_pu, "nmk-ske-keypad"), /* I0 */ + DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */ + DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */ + DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */ + DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */ + DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */ + DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */ + DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */ + DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */ + /* ske sleep state */ + DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */ + DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */ + DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */ + DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */ + DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */ + DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */ + DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */ + DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */ + DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */ + DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */ + DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */ + DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */ + DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */ + DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */ + DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */ + DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */ + /* Mux in and drive the SDI0 DAT31DIR line high at runtime */ DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"), DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"), @@ -403,28 +468,6 @@ static struct pinctrl_map __initdata hrefv60_pinmap[] = { DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"), DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"), DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"), - /* - * Make it possible to mux in the SKE keypad and bias the pins - * FIXME: what's the point with this on HREFv60? KP/SKE is already - * muxed in at another place! Enabling this will bork. - */ - DB8500_MUX("kp_a_2", "kp", "ske"), - DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */ - DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */ - DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */ - DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */ - DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */ - DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */ - DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */ - DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */ - DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */ - DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */ - DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */ - DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */ - DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */ - DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */ - DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */ - DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */ }; static struct pinctrl_map __initdata u9500_pinmap[] = {