From patchwork Tue Nov 6 13:15:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 12682 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 60EBA23E00 for ; Tue, 6 Nov 2012 13:15:28 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 23174A19BE2 for ; Tue, 6 Nov 2012 13:15:28 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id f6so237839iag.11 for ; Tue, 06 Nov 2012 05:15:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=FR2B+9bOh967jy5VNV6IQrBGFf7Zp9wxziT+e6p/xns=; b=Az7GItXAA/xZtqJCo3R0bvHD5Fw/3jupFCxZtuwI/Z+h6t1AhuhW2oPC0UqzU6TC5v hUpGLK4rgBvTpv+QTFGgtn0Pex1pDRDi3y/aGkgzlDpMVFrSHn8SO4EZVhxBl6MnlwxA ckEWOd/IlV21m+vAEnrMwYYQkJRsA/sw5KaXvdBHIYRpq13KsEedImYTimVwy+mAl+um KlFwgQNdoDp6oGGuzfQjf4WZxOlXG5WlvzPZEDFhWA8C6HLtOKZJwKLkJi/r7mL0YV20 Fe7w8JXj5J7PqhCDdtizM3RhHjnYWa+h++Ne/PB20t0hA47Vu5TvKlGXlxeskMjoyvpt 167g== Received: by 10.50.152.137 with SMTP id uy9mr823253igb.62.1352207727563; Tue, 06 Nov 2012 05:15:27 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp39673igt; Tue, 6 Nov 2012 05:15:27 -0800 (PST) Received: by 10.180.95.97 with SMTP id dj1mr2046321wib.3.1352207726411; Tue, 06 Nov 2012 05:15:26 -0800 (PST) Received: from eu1sys200aog112.obsmtp.com (eu1sys200aog112.obsmtp.com [207.126.144.133]) by mx.google.com with SMTP id m6si12971414eed.141.2012.11.06.05.15.22 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Nov 2012 05:15:26 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.133; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob112.postini.com ([207.126.147.11]) with SMTP ID DSNKUJkNaa+4cjUuxFNKlAHbphpTuB0gntjI@postini.com; Tue, 06 Nov 2012 13:15:26 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id DE14DE8; Tue, 6 Nov 2012 13:07:04 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D4043A3C; Tue, 6 Nov 2012 13:15:17 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 08F0FA8072; Tue, 6 Nov 2012 14:15:12 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 6 Nov 2012 14:15:16 +0100 From: Linus Walleij To: Cc: Anmar Oueja , Patrice Chotard , Linus Walleij Subject: [PATCH 2/9] ARM: ux500: 8500: add IDLE pin configuration for SPI Date: Tue, 6 Nov 2012 14:15:14 +0100 Message-ID: <1352207714-7848-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQnwPLqQqgNEaEeCr5KGxIfxEWdXJmjRP4e6+N+AWV2yAajGWxDEEISGxFh0euro5J2pFexT From: Patrice Chotard This adds an idle state to the SPI pin control entry. Signed-off-by: Patrice Chotard Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500-pins.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 8ab8688..9c9e465 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -70,6 +70,9 @@ BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_S PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func) #define DB8500_PIN(pin,conf,dev) \ PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf) +#define DB8500_PIN_IDLE(pin, conf, dev) \ + PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500", \ + pin, conf) #define DB8500_PIN_SLEEP(pin, conf, dev) \ PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ pin, conf) @@ -242,7 +245,12 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = { DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */ DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */ DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */ + /* SPI2 idle state */ + DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */ + DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */ + DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */ /* SPI2 sleep state */ + DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */ DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */ DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */ DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */