From patchwork Thu Oct 18 17:18:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 12349 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 84D9F241AD for ; Thu, 18 Oct 2012 17:18:57 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 27C10A18B9C for ; Thu, 18 Oct 2012 17:18:57 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id f6so6298072iag.11 for ; Thu, 18 Oct 2012 10:18:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=slEVpkwP0NcPIyzhyXyt0K2t3lzPXD3czyISGyN6BPg=; b=GGNpmI2QXYdy92ZoUDewcOu/XvfoX++ldCqcO0hMd00U2z/30M25kl9cZ0b+LxAgll n8fVrlps8GERCWbVwa6pPBCtb1xkt7y+AOIO9wM/w8+vUIVYJF0xl6NE37QOUH2BnL4G j4SmJpeftOCTCWFg5n0iCsWRPox+F13FrbUZ01BfT2dv7DFItktbCYxhhg+qZCxvbdZh IbvA+tp54DinvM8MIYwyq1mOLzB63LhAYomKfzyxD+AoIQRchY3TDuYZzisf++OksQNd B5jVH4HcLoB24AJ8WNmjILZ20+hIT//sBOg+l3tyScowanTg9YGC9o0ekNd7aLISuEHZ JwxQ== Received: by 10.50.91.195 with SMTP id cg3mr5621883igb.57.1350580736873; Thu, 18 Oct 2012 10:18:56 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp1109617igt; Thu, 18 Oct 2012 10:18:56 -0700 (PDT) Received: by 10.14.214.133 with SMTP id c5mr32591290eep.8.1350580735574; Thu, 18 Oct 2012 10:18:55 -0700 (PDT) Received: from eu1sys200aog116.obsmtp.com (eu1sys200aog116.obsmtp.com [207.126.144.141]) by mx.google.com with SMTP id f43si19820046eem.102.2012.10.18.10.18.51 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 10:18:55 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.141 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.141; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.141 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob116.postini.com ([207.126.147.11]) with SMTP ID DSNKUIA5+VPTtRLxo/Uqy6NT2gZTASH11lpP@postini.com; Thu, 18 Oct 2012 17:18:55 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 5327A4D; Thu, 18 Oct 2012 17:18:16 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id A034165; Thu, 18 Oct 2012 12:51:15 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 7333024C2C0; Thu, 18 Oct 2012 19:18:38 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Thu, 18 Oct 2012 19:18:46 +0200 From: Linus Walleij To: , Cc: Anmar Oueja , Linus Walleij , Alessandro Rubini Subject: [PATCH 2/8] ARM: plat-nomadik: pass IRQ to timer driver Date: Thu, 18 Oct 2012 19:18:41 +0200 Message-ID: <1350580721-8373-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkTd30Dx5V2lQqV2MNqwaOrx2NOFuqIqZaDy1Md01H27k3SjMmsb4Ttw/mipoerFgeK8mGr From: Linus Walleij In order to convert the MTU timer to work with sparse IRQ we need to pass the IRQ used when initializing instead of just letting it rely on a special name being used in the IRQ header file. Cc: Alessandro Rubini Signed-off-by: Linus Walleij --- arch/arm/mach-nomadik/board-nhk8815.c | 4 ++-- arch/arm/mach-ux500/timer.c | 2 +- arch/arm/plat-nomadik/include/plat/mtu.h | 2 +- arch/arm/plat-nomadik/timer.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 22ef8a1..16f10e0 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include @@ -37,6 +36,7 @@ #include #include +#include #include "cpu-8815.h" @@ -260,7 +260,7 @@ static void __init nomadik_timer_init(void) src_cr |= SRC_CR_INIT_VAL; writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); - nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE)); + nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0); } static struct sys_timer nomadik_timer = { diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index 6f39731..20d02fa 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -96,7 +96,7 @@ dt_fail: * */ - nmdk_timer_init(mtu_timer_base); + nmdk_timer_init(mtu_timer_base, IRQ_MTU0); clksrc_dbx500_prcmu_init(prcmu_timer_base); ux500_twd_init(); } diff --git a/arch/arm/plat-nomadik/include/plat/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h index 582641f..8008897 100644 --- a/arch/arm/plat-nomadik/include/plat/mtu.h +++ b/arch/arm/plat-nomadik/include/plat/mtu.h @@ -1,7 +1,7 @@ #ifndef __PLAT_MTU_H #define __PLAT_MTU_H -void nmdk_timer_init(void __iomem *base); +void nmdk_timer_init(void __iomem *base, int irq); void nmdk_clkevt_reset(void); void nmdk_clksrc_reset(void); diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 9222e55..0ae2b06 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c @@ -174,7 +174,7 @@ void nmdk_clksrc_reset(void) mtu_base + MTU_CR(0)); } -void __init nmdk_timer_init(void __iomem *base) +void __init nmdk_timer_init(void __iomem *base, int irq) { unsigned long rate; struct clk *clk0; @@ -217,7 +217,7 @@ void __init nmdk_timer_init(void __iomem *base) #endif /* Timer 1 is used for events, register irq and clockevents */ - setup_irq(IRQ_MTU0, &nmdk_timer_irq); + setup_irq(irq, &nmdk_timer_irq); nmdk_clkevt.cpumask = cpumask_of(0); clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU); }