From patchwork Fri Sep 28 21:36:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11859 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id ACDB524150 for ; Fri, 28 Sep 2012 21:36:24 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 3CB9BA1828E for ; Fri, 28 Sep 2012 21:36:24 +0000 (UTC) Received: by ieje10 with SMTP id e10so8011632iej.11 for ; Fri, 28 Sep 2012 14:36:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-provags-id:x-gm-message-state; bh=y7aMHFpiWooTev/LrpPKq5+K7LUhHXj50ku3hIbb2ek=; b=QUuhPv3WS3SBG263BU4KFalfe86/meZUqPm1FW4LIfB59EJa8f1TEq+wy4KlQxJbvS L6QA2orEZQnl9bqUJkJYl5ge9N7AbKHyesOE3Ko6mbTOhfyz8ByuMlSEtD3K03pdHCFv vCPvV7uFxs7uSSQ+4mMN2uEjjCrIdJ0OIFdTv0XR6vf3uXAmdqP5nD+P5Uk+f5a4McKz XhbdXkisTEEcN7iXCrTSqM75ZT59SdSh4bFBgS2HaK461O7mywjDiABFFn7EKDY/LRrr sPAlNgeU1EnH/riYTXuJkXbFXpKLRGhfxcHZkZA2UEijWNqFDyUOirIHgYbpaSLzwtV6 8KEA== Received: by 10.50.217.227 with SMTP id pb3mr25272igc.28.1348868183644; Fri, 28 Sep 2012 14:36:23 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp494981igc; Fri, 28 Sep 2012 14:36:22 -0700 (PDT) Received: by 10.180.100.131 with SMTP id ey3mr83671wib.15.1348868181699; Fri, 28 Sep 2012 14:36:21 -0700 (PDT) Received: from moutng.kundenserver.de (moutng.kundenserver.de. [212.227.17.10]) by mx.google.com with ESMTPS id r6si1935221wiw.0.2012.09.28.14.36.21 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 28 Sep 2012 14:36:21 -0700 (PDT) Received-SPF: neutral (google.com: 212.227.17.10 is neither permitted nor denied by best guess record for domain of arnd@arndb.de) client-ip=212.227.17.10; Authentication-Results: mx.google.com; spf=neutral (google.com: 212.227.17.10 is neither permitted nor denied by best guess record for domain of arnd@arndb.de) smtp.mail=arnd@arndb.de Received: from localhost.localdomain (HSI-KBW-149-172-5-253.hsi13.kabel-badenwuerttemberg.de [149.172.5.253]) by mrelayeu.kundenserver.de (node=mrbap2) with ESMTP (Nemesis) id 0Lr4bL-1Tv9uh2E9z-00dySe; Fri, 28 Sep 2012 23:36:20 +0200 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, arm@kernel.org, Arnd Bergmann , Krzysztof Halasa Subject: [PATCH 05/12] ARM: ixp4xx: use __iomem for MMIO Date: Fri, 28 Sep 2012 23:36:10 +0200 Message-Id: <1348868177-21205-6-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1348868177-21205-1-git-send-email-arnd@arndb.de> References: <1348868177-21205-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:Flkxu+zcKmOb3G1KXFQKI+41ZCASAn4zdb7nlMmkyJx 3ofTCOhC2IEuH1jFEFyVGuoL/CPYaaNjmGR6c1syM1DL+KH7jP uXXiEkR7GoMduEmwKR323CgrIUVIHvSVaRlClQ308oLe9OReAh 3YDSW8+UY4pgm3/1DFYhIdWrLJ13usj5hEtLPIBCDYmdZTJw+Z XxLZib1IfgaYUQomMIQON7EEE6PkFLKDPqBxe5eW7Tr/2ZeeIV P9Mu2wVgKkq9R4eit5FMXNhsqOaLOTnq/ryRMDBWrs2ZEltlgp TNdGSurlqwNGuLzvLsZsOeLzbOA21S8ztGUEeUZyOSlwQmpzlK RqntBkClxAlpub/cTfEfgDQ89sO1Tbr69H1+2tpWwVB26rfbnn goakW3BDK8L+g== X-Gm-Message-State: ALoCoQmJMqROE/s09HkA6jcQh94aO/aeA+5OaXzQRx9DtJNVoUnbXB56oFPKBmqZeWyq1zd8pNdo The ixp4xx queue manager uses "const struct qmgr_regs __iomem *" as the type for a pointer that is passed to __raw_writel, which is not allowed because of the const-ness. Dropping the 'const' keyword fixes the problem. While we're here, let's also drop the useless type cast. Without this patch, building ixp4xx_defconfig results in: In file included from arch/arm/mach-ixp4xx/ixp4xx_qmgr.c:15:0: arch/arm/mach-ixp4xx/include/mach/qmgr.h: In function 'qmgr_put_entry': arch/arm/mach-ixp4xx/include/mach/qmgr.h:96:2: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' In file included from drivers/net/ethernet/xscale/ixp4xx_eth.c:41:0: arch/arm/mach-ixp4xx/include/mach/qmgr.h: In function 'qmgr_put_entry': arch/arm/mach-ixp4xx/include/mach/qmgr.h:96:2: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' arch/arm/mach-ixp4xx/ixp4xx_qmgr.c: In function 'qmgr_set_irq': arch/arm/mach-ixp4xx/ixp4xx_qmgr.c:41:9: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' Signed-off-by: Arnd Bergmann Cc: Krzysztof Halasa --- Krzysztof, please apply in your next branch so this problem goes away in 3.8. I realize it won't make 3.7 any more since the base patches are not in arm-soc, but it's bad if linux-next is broken. arch/arm/mach-ixp4xx/include/mach/qmgr.h | 12 ++++++------ arch/arm/mach-ixp4xx/ixp4xx_qmgr.c | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h index 0a88d3b..4de8da5 100644 --- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h +++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h @@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue); static inline void qmgr_put_entry(unsigned int queue, u32 val) { - const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; + struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; #if DEBUG_QMGR BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ @@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val) static inline u32 qmgr_get_entry(unsigned int queue) { u32 val; - const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; + const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; val = __raw_readl(&qmgr_regs->acc[queue][0]); #if DEBUG_QMGR BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ @@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue) static inline int __qmgr_get_stat1(unsigned int queue) { - const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; + const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) >> ((queue & 7) << 2)) & 0xF; } static inline int __qmgr_get_stat2(unsigned int queue) { - const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; + const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; BUG_ON(queue >= HALF_QUEUES); return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) >> ((queue & 0xF) << 1)) & 0x3; @@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue) */ static inline int qmgr_stat_below_low_watermark(unsigned int queue) { - const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; + const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; if (queue >= HALF_QUEUES) return (__raw_readl(&qmgr_regs->statne_h) >> (queue - HALF_QUEUES)) & 0x01; @@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue) */ static inline int qmgr_stat_full(unsigned int queue) { - const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; + const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; if (queue >= HALF_QUEUES) return (__raw_readl(&qmgr_regs->statf_h) >> (queue - HALF_QUEUES)) & 0x01; diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c index 7c0584e..9d1b6b7 100644 --- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c +++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c @@ -14,7 +14,7 @@ #include #include -static const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; +static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT; static struct resource *mem_res; static spinlock_t qmgr_lock; static u32 used_sram_bitmap[4]; /* 128 16-dword pages */ @@ -32,7 +32,7 @@ void qmgr_set_irq(unsigned int queue, int src, spin_lock_irqsave(&qmgr_lock, flags); if (queue < HALF_QUEUES) { - const u32 __iomem *reg; + u32 __iomem *reg; int bit; BUG_ON(src > QUEUE_IRQ_SRC_NOT_FULL); reg = &qmgr_regs->irqsrc[queue >> 3]; /* 8 queues per u32 */