From patchwork Tue Mar 20 03:28:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Liu X-Patchwork-Id: 7362 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7F83D23E2F for ; Tue, 20 Mar 2012 03:29:14 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 1F753A1806D for ; Tue, 20 Mar 2012 03:29:14 +0000 (UTC) Received: by iage36 with SMTP id e36so13792792iag.11 for ; Mon, 19 Mar 2012 20:29:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=2wpLk1DxsGRw6GaF9owhFo7Ic9KIbP75tkaam9IwrsI=; b=Jgr/9KruSjACdgSuPBFNxtXfnRP50lQU0A2GGBDGgCcj76op+SVbIW/MtwMnGN0d8S JhTJIebc1dddhbWxCCIb1R5jcsb505MBIJxQrJvf4bUroMwoW2YYWIJRhEWNs4Vr/SeT RfIdH44xxGPLgH7l8NWnJTZ6MSa2tUUNi5KnhVdUrVCMKxoMiwUI1/80RxZYdjKJKmhj 9RTuL5lGqVCzpdPi+lB9kmsOFRwWh7yyAe7ElVYHh1JXFEkR1G21N9CElgXOj4C2PrmM wCV3YPSnx4WbqAoQD7etEsqHE4NmlKz7YKFiWTN8q7773moGzGH/yRZIGsICUcMvz7Ll Q+Hg== Received: by 10.50.183.163 with SMTP id en3mr7658853igc.12.1332214153555; Mon, 19 Mar 2012 20:29:13 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.203.79 with SMTP id fh15csp633ibb; Mon, 19 Mar 2012 20:29:13 -0700 (PDT) Received: by 10.68.239.233 with SMTP id vv9mr35398495pbc.75.1332214152818; Mon, 19 Mar 2012 20:29:12 -0700 (PDT) Received: from mail-pb0-f50.google.com (mail-pb0-f50.google.com [209.85.160.50]) by mx.google.com with ESMTPS id r4si296829pbi.335.2012.03.19.20.29.11 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Mar 2012 20:29:12 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.160.50 is neither permitted nor denied by best guess record for domain of paul.liu@linaro.org) client-ip=209.85.160.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.50 is neither permitted nor denied by best guess record for domain of paul.liu@linaro.org) smtp.mail=paul.liu@linaro.org Received: by pbcxa12 with SMTP id xa12so1766557pbc.37 for ; Mon, 19 Mar 2012 20:29:11 -0700 (PDT) Received: by 10.68.192.36 with SMTP id hd4mr19053177pbc.54.1332214151887; Mon, 19 Mar 2012 20:29:11 -0700 (PDT) Received: from freya.lan (host-77.138-185-111.static.totalbb.net.tw. [111.185.138.77]) by mx.google.com with ESMTPS id l8sm268212pbi.0.2012.03.19.20.29.09 (version=SSLv3 cipher=OTHER); Mon, 19 Mar 2012 20:29:11 -0700 (PDT) From: "Ying-Chun Liu (PaulLiu)" To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linaro-dev@lists.linaro.org, patches@linaro.org, "Ying-Chun Liu (PaulLiu)" , Richard Zhao , Shawn Guo Subject: [PATCH] ARM: dts: imx6q: add anatop regulators Date: Tue, 20 Mar 2012 11:28:59 +0800 Message-Id: <1332214139-6833-1-git-send-email-paul.liu@linaro.org> X-Mailer: git-send-email 1.7.9.1 X-Gm-Message-State: ALoCoQlK5pXbdJWK06YSMnTQt7KYg76R7Cca+h9ZYj8fPy4cEOFtB5bhIsmISdBqHYwipfbgWQK7 From: "Ying-Chun Liu (PaulLiu)" Add anatop regulators to imx6q.dtsi for all imx6q platforms. Signed-off-by: Ying-Chun Liu (PaulLiu) Signed-off-by: Richard Zhao Cc: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 86 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 86 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 263e8f3..dd41514 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -346,6 +346,92 @@ compatible = "fsl,imx6q-anatop"; reg = <0x020c8000 0x1000>; interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; + #address-cells = <1>; + #size-cells = <0>; + + regulator-vddpu@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + reg = <0x140>; + anatop-vol-bit-shift = <9>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1300000>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + reg = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1300000>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + reg = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1300000>; + }; + + regulator-2p5@130 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd2p5"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2775000>; + regulator-always-on; + reg = <0x130>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2000000>; + anatop-max-voltage = <2775000>; + }; + + regulator-1p1@110 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd1p1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + reg = <0x110>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <4>; + anatop-min-voltage = <800000>; + anatop-max-voltage = <1400000>; + }; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + reg = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <7>; + anatop-min-voltage = <2800000>; + anatop-max-voltage = <3150000>; + }; }; usbphy@020c9000 { /* USBPHY1 */