From patchwork Thu Mar 15 16:32:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 7312 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 545F823E12 for ; Thu, 15 Mar 2012 16:32:36 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 1CDE6A1811F for ; Thu, 15 Mar 2012 16:32:36 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so5497909iag.11 for ; Thu, 15 Mar 2012 09:32:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=cLnD6kCxj2xVcDy9Kv+kcnixiNXL5M5dZ1C9lI+elf8=; b=Ge/sf3OLQRUYFTFNQWfDRhzwOI7k4zIhPMFDUfqm7VM4kpggRkFkSpkldLQn7y5KKA OD9owM1XFgS2xMp7WJnQQ3nWzoEnYAAD6KIWux23gS1c1tMhekR7MPHlOPtT73JRNXI/ sJBL46XbwhQTHbrW672imSLIOCg6pTK+8lLfLvYigU2twWjTuYd3c4fDH237NUBTRjcC vB41KNA+C9ScvwOkvUO3FcA5QZwtthwq6i09907iBlQPPiHjC2k6DyGJe9POQ1IF1B3l DGwbqPafgPQPlOeeXxib0leeZ+3iC2OsUzqPTpJYx2anKsSKK40PCNwMZz3UGLcmjJrx yAVQ== Received: by 10.50.222.233 with SMTP id qp9mr10132317igc.58.1331829155863; Thu, 15 Mar 2012 09:32:35 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp40812ibg; Thu, 15 Mar 2012 09:32:35 -0700 (PDT) Received: by 10.204.141.10 with SMTP id k10mr2817579bku.51.1331829154594; Thu, 15 Mar 2012 09:32:34 -0700 (PDT) Received: from mail-bk0-f50.google.com (mail-bk0-f50.google.com [209.85.214.50]) by mx.google.com with ESMTPS id tb1si1188320bkb.133.2012.03.15.09.32.34 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 15 Mar 2012 09:32:34 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.214.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=209.85.214.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.214.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by mail-bk0-f50.google.com with SMTP id w11so3194041bku.37 for ; Thu, 15 Mar 2012 09:32:34 -0700 (PDT) Received: by 10.205.137.14 with SMTP id im14mr2763728bkc.137.1331829153923; Thu, 15 Mar 2012 09:32:33 -0700 (PDT) Received: from e103592.peterhouse.linaro.org (fw-lnat.cambridge.arm.com. [217.140.96.63]) by mx.google.com with ESMTPS id u5sm4753780bka.5.2012.03.15.09.32.30 (version=SSLv3 cipher=OTHER); Thu, 15 Mar 2012 09:32:32 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Stefano Stabellini , Ian Campbell , Rusty Russell , Christoffer Dall , Will Deacon , Marc Zyngier , Rabin Vincent , Jon Medhurst Subject: [PATCH 3/4] ARM: opcodes: Add helpers for emitting custom opcodes Date: Thu, 15 Mar 2012 16:32:11 +0000 Message-Id: <1331829132-9762-4-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1331829132-9762-1-git-send-email-dave.martin@linaro.org> References: <1331829132-9762-1-git-send-email-dave.martin@linaro.org> X-Gm-Message-State: ALoCoQmsxP2As/OWXKqsmiKCNVgXPCO/GCqfdBny5b5Mj5a1MSoB8aYUwoy36v6WFue3+vNCNkl/ This patch adds some __inst_() macros for injecting custom opcodes in assembler (both inline and in .S files). They should make it easier and cleaner to get things right in little-/big- endian/ARM/Thumb-2 kernels without a lot of #ifdefs. Signed-off-by: Dave Martin Acked-by: Nicolas Pitre --- arch/arm/include/asm/opcodes.h | 69 ++++++++++++++++++++++++++++++++++++++++ 1 files changed, 69 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h index 32730a8..50ef0be 100644 --- a/arch/arm/include/asm/opcodes.h +++ b/arch/arm/include/asm/opcodes.h @@ -156,4 +156,73 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \ ) +/* + * Opcode injection helpers + * + * In rare cases it is necessary to assemble an opcode which the + * assembler does not support directly, or which would normally be + * rejected because of the CFLAGS or AFLAGS used to build the affected + * file. + * + * Before using these macros, consider carefully whether it is feasible + * instead to change the build flags for your file, or whether it really + * makes sense to support old assembler versions when building that + * particular kernel feature. + * + * The macros defined here should only be used where there is no viable + * alternative. + * + * + * __inst_arm(x): emit the specified ARM opcode + * __inst_thumb16(x): emit the specified 16-bit Thumb opcode + * __inst_thumb32(x): emit the specified 32-bit Thumb opcode + * + * __inst_arm_thumb16(arm, thumb): emit either the specified arm or + * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2 + * kernel is being built + * + * __inst_arm_thumb32(arm, thumb): emit either the specified arm or + * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2 + * kernel is being built + * + * + * Note that using these macros directly is poor practice. Instead, you + * should use them to define human-readable wrapper macros to encode the + * instructions that you care about. In code which might run on ARMv7 or + * above, you can usually use the __inst_arm_thumb{16,32} macros to + * specify the ARM and Thumb alternatives at the same time. This ensures + * that the correct opcode gets emitted depending on the instruction set + * used for the kernel build. + */ +#include + +#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x)) +#define __inst_thumb32(x) ___inst_thumb32( \ + ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \ + ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \ +) +#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x)) + +#ifdef CONFIG_THUMB2_KERNEL +#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \ + __inst_thumb16(thumb_opcode) +#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \ + __inst_thumb32(thumb_opcode) +#else +#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode) +#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode) +#endif + +/* Helpers for the helpers. Don't use these directly. */ +#ifdef __ASSEMBLY__ +#define ___inst_arm(x) .long x +#define ___inst_thumb16(x) .short x +#define ___inst_thumb32(first, second) .short first, second +#else +#define ___inst_arm(x) ".long " __stringify(x) "\n\t" +#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t" +#define ___inst_thumb32(first, second) \ + ".short " __stringify(first) ", " __stringify(second) "\n\t" +#endif + #endif /* __ASM_ARM_OPCODES_H */