From patchwork Mon Feb 27 04:47:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob X-Patchwork-Id: 6945 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D364523E01 for ; Mon, 27 Feb 2012 04:48:13 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 9C1ECA185F5 for ; Mon, 27 Feb 2012 04:48:13 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id z7so7824105iab.11 for ; Sun, 26 Feb 2012 20:48:13 -0800 (PST) Received: from mr.google.com ([10.50.87.201]) by 10.50.87.201 with SMTP id ba9mr15422780igb.30.1330318093477 (num_hops = 1); Sun, 26 Feb 2012 20:48:13 -0800 (PST) Received: by 10.50.87.201 with SMTP id ba9mr12434140igb.30.1330318093279; Sun, 26 Feb 2012 20:48:13 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.11.10 with SMTP id r10csp57810ibr; Sun, 26 Feb 2012 20:48:12 -0800 (PST) Received: by 10.236.9.1 with SMTP id 1mr14005520yhs.14.1330318092646; Sun, 26 Feb 2012 20:48:12 -0800 (PST) Received: from mail-gy0-f178.google.com (mail-gy0-f178.google.com [209.85.160.178]) by mx.google.com with ESMTPS id t5si13961339yht.93.2012.02.26.20.48.12 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 26 Feb 2012 20:48:12 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.178 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) client-ip=209.85.160.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.178 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) smtp.mail=rob.lee@linaro.org Received: by mail-gy0-f178.google.com with SMTP id f1so185830ghb.37 for ; Sun, 26 Feb 2012 20:48:12 -0800 (PST) Received-SPF: pass (google.com: domain of rob.lee@linaro.org designates 10.236.170.41 as permitted sender) client-ip=10.236.170.41; Received: from mr.google.com ([10.236.170.41]) by 10.236.170.41 with SMTP id o29mr936910yhl.83.1330318092495 (num_hops = 1); Sun, 26 Feb 2012 20:48:12 -0800 (PST) MIME-Version: 1.0 Received: by 10.236.170.41 with SMTP id o29mr684428yhl.83.1330318089911; Sun, 26 Feb 2012 20:48:09 -0800 (PST) Received: from b18647-20 ([67.23.168.6]) by mx.google.com with ESMTPS id w44sm35245363yhk.17.2012.02.26.20.48.07 (version=SSLv3 cipher=OTHER); Sun, 26 Feb 2012 20:48:09 -0800 (PST) From: Robert Lee To: len.brown@intel.com, khilman@ti.com Cc: robherring2@gmail.com, Baohua.Song@csr.com, amit.kucheria@linaro.org, nicolas.ferre@atmel.com, linux@maxim.org.za, kgene.kim@samsung.com, amit.kachhap@linaro.org, magnus.damm@gmail.com, nsekhar@ti.com, daniel.lezcano@linaro.org, mturquette@linaro.org, vincent.guittot@linaro.org, arnd.bergmann@linaro.org, linux-arm-kernel@lists.infradead.org, linaro-dev@lists.linaro.org, patches@linaro.org, deepthi@linux.vnet.ibm.com, broonie@opensource.wolfsonmicro.com, nicolas.pitre@linaro.org, linux@arm.linux.org.uk, jean.pihet@newoldbits.com Subject: [PATCH v5 6/9] ARM: davinci: Consolidate cpuidle functionality Date: Sun, 26 Feb 2012 22:47:40 -0600 Message-Id: <1330318063-25460-7-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1330318063-25460-1-git-send-email-rob.lee@linaro.org> References: <1330318063-25460-1-git-send-email-rob.lee@linaro.org> X-Gm-Message-State: ALoCoQlL+8CI4OHQLtkHmWhS9wLqAWC0CfXqqkVU2oI7sFfBVxHwPlPEIDY4vksodPLjvNJ+ysCN Use newly added core cpuidle functionality and remove this duplicated code from the platform cpuidle. Signed-off-by: Robert Lee --- arch/arm/mach-davinci/cpuidle.c | 77 +++++++++++++++------------------------ 1 files changed, 30 insertions(+), 47 deletions(-) diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c index a30c7c5..c3f19d9 100644 --- a/arch/arm/mach-davinci/cpuidle.c +++ b/arch/arm/mach-davinci/cpuidle.c @@ -30,12 +30,42 @@ struct davinci_ops { u32 flags; }; +/* Actual code that puts the SoC in different idle states */ +static int davinci_enter_idle(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; + struct davinci_ops *ops = cpuidle_get_statedata(state_usage); + + if (ops && ops->enter) + ops->enter(ops->flags); + + return cpuidle_wrap_enter(dev, drv, index, + cpuidle_simple_enter); + + if (ops && ops->exit) + ops->exit(ops->flags); + + return index; +} + /* fields in davinci_ops.flags */ #define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN BIT(0) static struct cpuidle_driver davinci_idle_driver = { .name = "cpuidle-davinci", .owner = THIS_MODULE, + .states[0] = CPUIDLE_ARM_WFI_STATE, + .states[1] = { + .enter = davinci_enter_idle, + .exit_latency = 10, + .target_residency = 100000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "DDR SR", + .desc = "WFI and DDR Self Refresh", + }, + .state_count = DAVINCI_CPUIDLE_MAX_STATES, }; static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device); @@ -77,41 +107,10 @@ static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = { }, }; -/* Actual code that puts the SoC in different idle states */ -static int davinci_enter_idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; - struct davinci_ops *ops = cpuidle_get_statedata(state_usage); - struct timeval before, after; - int idle_time; - - local_irq_disable(); - do_gettimeofday(&before); - - if (ops && ops->enter) - ops->enter(ops->flags); - /* Wait for interrupt state */ - cpu_do_idle(); - if (ops && ops->exit) - ops->exit(ops->flags); - - do_gettimeofday(&after); - local_irq_enable(); - idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + - (after.tv_usec - before.tv_usec); - - dev->last_residency = idle_time; - - return index; -} - static int __init davinci_cpuidle_probe(struct platform_device *pdev) { int ret; struct cpuidle_device *device; - struct cpuidle_driver *driver = &davinci_idle_driver; struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; device = &per_cpu(davinci_cpuidle_device, smp_processor_id()); @@ -123,27 +122,11 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) ddr2_reg_base = pdata->ddr2_ctlr_base; - /* Wait for interrupt state */ - driver->states[0].enter = davinci_enter_idle; - driver->states[0].exit_latency = 1; - driver->states[0].target_residency = 10000; - driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID; - strcpy(driver->states[0].name, "WFI"); - strcpy(driver->states[0].desc, "Wait for interrupt"); - - /* Wait for interrupt and DDR self refresh state */ - driver->states[1].enter = davinci_enter_idle; - driver->states[1].exit_latency = 10; - driver->states[1].target_residency = 10000; - driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID; - strcpy(driver->states[1].name, "DDR SR"); - strcpy(driver->states[1].desc, "WFI and DDR Self Refresh"); if (pdata->ddr2_pdown) davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN; cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]); device->state_count = DAVINCI_CPUIDLE_MAX_STATES; - driver->state_count = DAVINCI_CPUIDLE_MAX_STATES; ret = cpuidle_register_driver(&davinci_idle_driver); if (ret) {