From patchwork Thu Feb 9 10:07:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 6720 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 1BB8623ECA for ; Thu, 9 Feb 2012 10:07:28 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id D15B4A18624 for ; Thu, 9 Feb 2012 10:07:27 +0000 (UTC) Received: by iabz7 with SMTP id z7so3055539iab.11 for ; Thu, 09 Feb 2012 02:07:27 -0800 (PST) Received: by 10.50.57.234 with SMTP id l10mr1598894igq.12.1328782047235; Thu, 09 Feb 2012 02:07:27 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.12.131 with SMTP id x3cs34697ibx; Thu, 9 Feb 2012 02:07:26 -0800 (PST) Received: by 10.180.81.66 with SMTP id y2mr1676827wix.20.1328782045113; Thu, 09 Feb 2012 02:07:25 -0800 (PST) Received: from mail-we0-f178.google.com (mail-we0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id r37si1250629weq.32.2012.02.09.02.07.24 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 09 Feb 2012 02:07:25 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) smtp.mail=daniel.lezcano@linaro.org Received: by werb12 with SMTP id b12so1386173wer.37 for ; Thu, 09 Feb 2012 02:07:24 -0800 (PST) MIME-Version: 1.0 Received: by 10.180.86.9 with SMTP id l9mr1698876wiz.15.1328782044601; Thu, 09 Feb 2012 02:07:24 -0800 (PST) Received: from localhost.localdomain (AToulouse-159-1-49-54.w92-134.abo.wanadoo.fr. [92.134.80.54]) by mx.google.com with ESMTPS id eq5sm6379666wib.2.2012.02.09.02.07.22 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 09 Feb 2012 02:07:23 -0800 (PST) From: Daniel Lezcano To: srinidhi.kasagar@stericsson.com, linus.walleij@stericsson.com Cc: linux-arm-kernel@lists.infradead.org, rickard.andersson@stericsson.com, jonas.aberg@stericsson.com, patches@linaro.org, linaro-dev@lists.linaro.org Subject: [PATCH][V2] ux500 : decouple/recouple gic from the PRCMU Date: Thu, 9 Feb 2012 11:07:20 +0100 Message-Id: <1328782040-7786-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.5.4 X-Gm-Message-State: ALoCoQnt3/pJj0Gr7iA/Pow0kGNQ38wemxNYZZy0Z6HJVHxjvW9BZPGOwY/5XNye4WUR3+XKug3Z This patch allows to decouple and recouple the gic from the PRCMU. This is needed to put the A9 core in retention mode with the cpuidle driver. Signed-off-by: Daniel Lezcano --- drivers/mfd/db8500-prcmu.c | 29 +++++++++++++++++++++++++++++ include/linux/mfd/db8500-prcmu.h | 2 ++ include/linux/mfd/dbx500-prcmu.h | 16 ++++++++++++++++ 3 files changed, 47 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index af8e0ef..70f39a1 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -787,6 +787,35 @@ int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll) return 0; } +#define PRCMU_A9_MASK_REQ 0x00000328 +#define PRCMU_A9_MASK_REQ_MASK 0x00000001 +#define PRCMU_GIC_DELAY 1 + +/* This function decouple the gic from the prcmu */ +void db8500_prcmu_gic_decouple(void) +{ + u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Set bit 0 register value to 1 */ + writel((val & ~PRCMU_A9_MASK_REQ_MASK) | PRCMU_A9_MASK_REQ_MASK, + _PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Make sure the register is updated */ + readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Wait a few cycles for the gic mask completion */ + udelay(PRCMU_GIC_DELAY); +} + +/* This function recouple the gic with the prcmu */ +void db8500_prcmu_gic_recouple(void) +{ + u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Set bit 0 register value to 0 */ + writel((val & ~PRCMU_A9_MASK_REQ_MASK), _PRCMU_BASE + PRCMU_A9_MASK_REQ); +} + /* This function should only be called while mb0_transfer.lock is held. */ static void config_wakeups(void) { diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 60d27f7..4a1032c 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -536,6 +536,8 @@ int prcmu_load_a9wdog(u8 id, u32 val); void db8500_prcmu_system_reset(u16 reset_code); int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll); +void db8500_prcmu_gic_disable(void); +void db8500_prcmu_gic_enable(void); void db8500_prcmu_enable_wakeups(u32 wakeups); int db8500_prcmu_set_epod(u16 epod_id, u8 epod_state); int db8500_prcmu_request_clock(u8 clock, bool enable); diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index bac942f..a5fee69 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -237,6 +237,22 @@ static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, keep_ap_pll); } +static inline void prcmu_gic_disable(void) +{ + if (machine_is_u5500()) + return; + else + return db8500_prcmu_gic_disable(); +} + +static inline void prcmu_gic_enable(void) +{ + if (machine_is_u5500()) + return; + else + return db8500_prcmu_gic_enable(); +} + static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) { if (machine_is_u5500())