From patchwork Tue Jan 24 23:56:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 6385 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3185D23E81 for ; Tue, 24 Jan 2012 23:56:13 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 1B8BBA184A7 for ; Tue, 24 Jan 2012 23:56:13 +0000 (UTC) Received: by bkar19 with SMTP id r19so4746697bka.11 for ; Tue, 24 Jan 2012 15:56:12 -0800 (PST) Received: by 10.205.127.17 with SMTP id gy17mr5868949bkc.110.1327449372782; Tue, 24 Jan 2012 15:56:12 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.130.220 with SMTP id u28cs118201bks; Tue, 24 Jan 2012 15:56:12 -0800 (PST) Received: by 10.180.97.37 with SMTP id dx5mr30878835wib.3.1327449371190; Tue, 24 Jan 2012 15:56:11 -0800 (PST) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id g10si7520805wix.19.2012.01.24.15.56.11 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jan 2012 15:56:11 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) smtp.mail=daniel.lezcano@linaro.org Received: by wgbdr11 with SMTP id dr11so4963570wgb.31 for ; Tue, 24 Jan 2012 15:56:11 -0800 (PST) MIME-Version: 1.0 Received: by 10.180.96.161 with SMTP id dt1mr7410299wib.13.1327449371007; Tue, 24 Jan 2012 15:56:11 -0800 (PST) Received: from localhost.localdomain (AToulouse-159-1-6-230.w90-60.abo.wanadoo.fr. [90.60.241.230]) by mx.google.com with ESMTPS id em13sm21411324wid.7.2012.01.24.15.56.09 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jan 2012 15:56:10 -0800 (PST) From: Daniel Lezcano To: linux@maxim.org.za, nicolas.ferre@atmel.com, plagnioj@jcrosoft.com Cc: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/4] at91 : coding style fixes Date: Wed, 25 Jan 2012 00:56:05 +0100 Message-Id: <1327449368-29917-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.5.4 X-Gm-Message-State: ALoCoQlm1NGxic/xt4n0KJc8EUeJ+8kkYgQi7js+o5GwVhaL6miqzQErUgT2G/VTrR6BVQqPYkot This patch is mindless and does only fix the line length. The purpose is to facilitate the review of the next patches. Signed-off-by: Daniel Lezcano Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/pm.h | 31 +++++++++++++++++++++---------- 1 files changed, 21 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index ce9a206..92d2223 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -20,14 +20,16 @@ static inline u32 sdram_selfrefresh_enable(void) return saved_lpr; } -#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ - : : "r" (0)) +#define sdram_selfrefresh_disable(saved_lpr) \ + at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#define wait_for_interrupt_enable() \ + asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ + : : "r" (0)) #elif defined(CONFIG_ARCH_AT91CAP9) #include - static inline u32 sdram_selfrefresh_enable(void) { u32 saved_lpr, lpr; @@ -35,12 +37,16 @@ static inline u32 sdram_selfrefresh_enable(void) saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR); lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; - at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); + at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | + AT91_DDRSDRC_LPCB_SELF_REFRESH); return saved_lpr; } -#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr) -#define wait_for_interrupt_enable() cpu_do_idle() +#define sdram_selfrefresh_disable(saved_lpr) \ + at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr) + +#define wait_for_interrupt_enable() \ + cpu_do_idle() #elif defined(CONFIG_ARCH_AT91SAM9G45) #include @@ -77,6 +83,7 @@ static inline u32 sdram_selfrefresh_enable(void) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ } while (0) + #define wait_for_interrupt_enable() cpu_do_idle() #else @@ -97,11 +104,15 @@ static inline u32 sdram_selfrefresh_enable(void) saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR); lpr = saved_lpr & ~AT91_SDRAMC_LPCB; - at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); + at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | + AT91_SDRAMC_LPCB_SELF_REFRESH); return saved_lpr; } -#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() cpu_do_idle() +#define sdram_selfrefresh_disable(saved_lpr) \ + at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) + +#define wait_for_interrupt_enable() \ + cpu_do_idle() #endif