From patchwork Tue Jan 24 04:37:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob X-Patchwork-Id: 6362 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C052823E0E for ; Tue, 24 Jan 2012 04:37:54 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id B04C6A180D2 for ; Tue, 24 Jan 2012 04:37:54 +0000 (UTC) Received: by mail-bk0-f52.google.com with SMTP id r19so3637941bka.11 for ; Mon, 23 Jan 2012 20:37:54 -0800 (PST) Received: by 10.205.139.12 with SMTP id iu12mr4234207bkc.2.1327379874512; Mon, 23 Jan 2012 20:37:54 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.130.220 with SMTP id u28cs90839bks; Mon, 23 Jan 2012 20:37:54 -0800 (PST) Received: by 10.236.139.234 with SMTP id c70mr15719258yhj.33.1327379872678; Mon, 23 Jan 2012 20:37:52 -0800 (PST) Received: from mail-yw0-f50.google.com (mail-yw0-f50.google.com [209.85.213.50]) by mx.google.com with ESMTPS id n61si15188079yhk.80.2012.01.23.20.37.51 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 23 Jan 2012 20:37:52 -0800 (PST) Received-SPF: neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) client-ip=209.85.213.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) smtp.mail=rob.lee@linaro.org Received: by yhoo22 with SMTP id o22so1779728yho.37 for ; Mon, 23 Jan 2012 20:37:51 -0800 (PST) MIME-Version: 1.0 Received: by 10.236.145.102 with SMTP id o66mr15338158yhj.28.1327379870972; Mon, 23 Jan 2012 20:37:50 -0800 (PST) Received: from b18647-20 ([23.19.172.97]) by mx.google.com with ESMTPS id h29sm14021831ann.16.2012.01.23.20.37.48 (version=SSLv3 cipher=OTHER); Mon, 23 Jan 2012 20:37:50 -0800 (PST) From: Robert Lee To: len.brown@intel.com, linux-pm@vger.kernel.org, s.hauer@pengutronix.de, amit.kucheria@linaro.org Cc: linux@arm.linux.org.uk, shawn.guo@freescale.com, nicolas.ferre@atmel.com, linux@maxim.org.za, kgene.kim@samsung.com, amit.kachhap@linaro.org, magnus.damm@gmail.com, khilman@ti.com, nsekhar@ti.com, daniel.lezcano@linaro.org, mturquette@linaro.org, vincent.guittot@linaro.org, arnd.bergmann@linaro.org, linux-arm-kernel@lists.infradead.org, patches@linaro.org, deepthi@linux.vnet.ibm.com, broonie@opensource.wolfsonmicro.com, nicolas.pitre@linaro.org, robherring2@gmail.com Subject: [PATCH v3 6/7] ARM: imx: Init imx5 gpc_dvfs clock for global use Date: Mon, 23 Jan 2012 22:37:33 -0600 Message-Id: <1327379854-12403-7-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1327379854-12403-1-git-send-email-rob.lee@linaro.org> References: <1327379854-12403-1-git-send-email-rob.lee@linaro.org> X-Gm-Message-State: ALoCoQm0bOSzAqJjbFMc8NAkF1jV7xKSrMozWNM6qq+ucQp7l8L5y47qhbI9y7o9SkCL+04hqsJQ The gpc_dvfs clock consumes practically zero power and must be enabled for various low power funcitonality. Now that a second user of this clock is being added (cpuidle) for mx5, it is cleanest to just enable this clock during clock initialization and leave it enabled. Signed-off-by: Robert Lee --- arch/arm/mach-mx5/clock-mx51-mx53.c | 3 +++ arch/arm/mach-mx5/pm-imx5.c | 24 ++---------------------- 2 files changed, 5 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 4cb2769..12c8a2b 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1533,6 +1533,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx53-ahci.0", "ahci", sata_clk) _REGISTER_CLOCK("imx53-ahci.0", "ahci_phy", ahci_phy_clk) _REGISTER_CLOCK("imx53-ahci.0", "ahci_dma", ahci_dma_clk) + _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk) }; static void clk_tree_init(void) @@ -1572,6 +1573,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, clk_enable(&cpu_clk); clk_enable(&main_bus_clk); + clk_enable(&gpc_dvfs_clk); clk_enable(&iim_clk); imx_print_silicon_rev("i.MX51", mx51_revision()); @@ -1615,6 +1617,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, clk_set_parent(&uart_root_clk, &pll3_sw_clk); clk_enable(&cpu_clk); clk_enable(&main_bus_clk); + clk_enable(&gpc_dvfs_clk); clk_enable(&iim_clk); imx_print_silicon_rev("i.MX53", mx53_revision()); diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c index 98052fc..36c5b57 100644 --- a/arch/arm/mach-mx5/pm-imx5.c +++ b/arch/arm/mach-mx5/pm-imx5.c @@ -18,13 +18,6 @@ #include #include "crm_regs.h" -static struct clk *gpc_dvfs_clk; - -static int mx5_suspend_prepare(void) -{ - return clk_enable(gpc_dvfs_clk); -} - static int mx5_suspend_enter(suspend_state_t state) { switch (state) { @@ -50,11 +43,6 @@ static int mx5_suspend_enter(suspend_state_t state) return 0; } -static void mx5_suspend_finish(void) -{ - clk_disable(gpc_dvfs_clk); -} - static int mx5_pm_valid(suspend_state_t state) { return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); @@ -62,21 +50,13 @@ static int mx5_pm_valid(suspend_state_t state) static const struct platform_suspend_ops mx5_suspend_ops = { .valid = mx5_pm_valid, - .prepare = mx5_suspend_prepare, .enter = mx5_suspend_enter, - .finish = mx5_suspend_finish, }; static int __init mx5_pm_init(void) { - if (gpc_dvfs_clk == NULL) - gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); - - if (!IS_ERR(gpc_dvfs_clk)) { - if (cpu_is_mx51()) - suspend_set_ops(&mx5_suspend_ops); - } else - return -EPERM; + if (cpu_is_mx51()) + suspend_set_ops(&mx5_suspend_ops); return 0; }