From patchwork Mon Jan 16 17:10:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Liu X-Patchwork-Id: 6232 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5DAAB23F83 for ; Mon, 16 Jan 2012 17:11:25 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 4CE20A1830D for ; Mon, 16 Jan 2012 17:11:25 +0000 (UTC) Received: by mail-bk0-f52.google.com with SMTP id zt4so765054bkb.11 for ; Mon, 16 Jan 2012 09:11:25 -0800 (PST) Received: by 10.205.141.72 with SMTP id jd8mr805666bkc.135.1326733885095; Mon, 16 Jan 2012 09:11:25 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs95867bkc; Mon, 16 Jan 2012 09:11:24 -0800 (PST) Received: by 10.52.68.48 with SMTP id s16mr6546064vdt.45.1326733883135; Mon, 16 Jan 2012 09:11:23 -0800 (PST) Received: from mail-vw0-f50.google.com (mail-vw0-f50.google.com [209.85.212.50]) by mx.google.com with ESMTPS id w3si998262vdh.102.2012.01.16.09.11.22 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 16 Jan 2012 09:11:23 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.50 is neither permitted nor denied by best guess record for domain of paul.liu@linaro.org) client-ip=209.85.212.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.50 is neither permitted nor denied by best guess record for domain of paul.liu@linaro.org) smtp.mail=paul.liu@linaro.org Received: by vbbfq11 with SMTP id fq11so1294858vbb.37 for ; Mon, 16 Jan 2012 09:11:22 -0800 (PST) Received: by 10.52.71.178 with SMTP id w18mr6448265vdu.119.1326733882161; Mon, 16 Jan 2012 09:11:22 -0800 (PST) Received: from freya.lan (host-77.138-185-111.static.totalbb.net.tw. [111.185.138.77]) by mx.google.com with ESMTPS id iv10sm15738546vdb.18.2012.01.16.09.11.17 (version=SSLv3 cipher=OTHER); Mon, 16 Jan 2012 09:11:20 -0800 (PST) From: "Ying-Chun Liu (PaulLiu)" To: linux-arm-kernel@lists.infradead.org, linaro-dev@lists.linaro.org Cc: patches@linaro.org, eric.miao@linaro.org, "Ying-Chun Liu (PaulLiu)" , Amit Kucheria , Sascha Hauer Subject: [PATCH] mx53_loco: add DA9053 PMIC support Date: Tue, 17 Jan 2012 01:10:53 +0800 Message-Id: <1326733853-13956-2-git-send-email-paul.liu@linaro.org> X-Mailer: git-send-email 1.7.8.3 In-Reply-To: <1326733853-13956-1-git-send-email-paul.liu@linaro.org> References: <1326733853-13956-1-git-send-email-paul.liu@linaro.org> From: "Ying-Chun Liu (PaulLiu)" Add DA9052 PMIC support for Freescale QuickStart Loco board. The model of PMIC on QuickStart Loco board is "da9053-aa". Signed-off-by: Ying-Chun Liu (PaulLiu) Cc: Amit Kucheria Cc: Sascha Hauer --- arch/arm/mach-mx5/board-mx53_loco.c | 128 +++++++++++++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/irqs.h | 10 +++- 2 files changed, 137 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index fd8b524..61dd8c9 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -23,10 +23,21 @@ #include #include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include #include #include +#include +#include #include #include @@ -45,6 +56,32 @@ #define LOCO_SD1_CD IMX_GPIO_NR(3, 13) #define LOCO_ACCEL_EN IMX_GPIO_NR(6, 14) +#define DA9052_LDO1_VOLT_UPPER 1800 +#define DA9052_LDO1_VOLT_LOWER 600 +#define DA9052_LDO1_VOLT_STEP 50 +#define DA9052_LDO2_VOLT_UPPER 1800 +#define DA9052_LDO2_VOLT_LOWER 600 +#define DA9052_LDO2_VOLT_STEP 25 +#define DA9052_LDO34_VOLT_UPPER 3300 +#define DA9052_LDO34_VOLT_LOWER 1725 +#define DA9052_LDO34_VOLT_STEP 25 +#define DA9052_LDO567810_VOLT_UPPER 3600 +#define DA9052_LDO567810_VOLT_LOWER 1200 +#define DA9052_LDO567810_VOLT_STEP 50 +#define DA9052_LDO9_VOLT_STEP 50 +#define DA9052_LDO9_VOLT_LOWER 1250 +#define DA9052_LDO9_VOLT_UPPER 3650 +/* Buck Config Validation Macros */ +#define DA9052_BUCK_CORE_PRO_VOLT_UPPER 2075 +#define DA9052_BUCK_CORE_PRO_VOLT_LOWER 500 +#define DA9052_BUCK_CORE_PRO_STEP 25 +#define DA9052_BUCK_MEM_VOLT_UPPER 2500 +#define DA9052_BUCK_MEM_VOLT_LOWER 925 +#define DA9052_BUCK_MEM_STEP 25 +#define DA9052_BUCK_PERI_VOLT_UPPER 2500 +#define DA9052_BUCK_PERI_VOLT_LOWER 925 +#define DA9052_BUCK_PERI_STEP 25 + static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ MX53_PAD_FEC_MDC__FEC_MDC, @@ -227,6 +264,93 @@ static const struct esdhc_platform_data mx53_loco_sd3_data __initconst = { .wp_type = ESDHC_WP_GPIO, }; +#define DA9052_LDO(max, min, rname, suspend_mv) \ +{\ + .constraints = {\ + .name = (rname), \ + .max_uV = (max) * 1000,\ + .min_uV = (min) * 1000,\ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE\ + |REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE,\ + .valid_modes_mask = REGULATOR_MODE_NORMAL,\ + .state_mem = { \ + .uV = suspend_mv * 1000, \ + .mode = REGULATOR_MODE_NORMAL, \ + .enabled = (0 == suspend_mv) ? 0 : 1, \ + .disabled = 0, \ + }, \ + },\ +} + +/* currently the suspend_mv here takes no effects for DA9053 +preset-voltage have to be done in the latest stage during +suspend*/ +static struct regulator_init_data da9052_regulators_init[] = { + /* BUCKS */ + DA9052_LDO(DA9052_BUCK_CORE_PRO_VOLT_UPPER, + DA9052_BUCK_CORE_PRO_VOLT_LOWER, "DA9052_BUCK_CORE", 850), + DA9052_LDO(DA9052_BUCK_CORE_PRO_VOLT_UPPER, + DA9052_BUCK_CORE_PRO_VOLT_LOWER, "DA9052_BUCK_PRO", 950), + DA9052_LDO(DA9052_BUCK_MEM_VOLT_UPPER, + DA9052_BUCK_MEM_VOLT_LOWER, "DA9052_BUCK_MEM", 1500), + DA9052_LDO(DA9052_BUCK_PERI_VOLT_UPPER, + DA9052_BUCK_PERI_VOLT_LOWER, "DA9052_BUCK_PERI", 2500), + DA9052_LDO(DA9052_LDO1_VOLT_UPPER, + DA9052_LDO1_VOLT_LOWER, "DA9052_LDO1", 1300), + DA9052_LDO(DA9052_LDO2_VOLT_UPPER, + DA9052_LDO2_VOLT_LOWER, "DA9052_LDO2", 1300), + DA9052_LDO(DA9052_LDO34_VOLT_UPPER, + DA9052_LDO34_VOLT_LOWER, "DA9052_LDO3", 3300), + DA9052_LDO(DA9052_LDO34_VOLT_UPPER, + DA9052_LDO34_VOLT_LOWER, "DA9052_LDO4", 2775), + DA9052_LDO(DA9052_LDO567810_VOLT_UPPER, + DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO5", 1300), + DA9052_LDO(DA9052_LDO567810_VOLT_UPPER, + DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO6", 1200), + DA9052_LDO(DA9052_LDO567810_VOLT_UPPER, + DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO7", 2750), + DA9052_LDO(DA9052_LDO567810_VOLT_UPPER, + DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO8", 1800), + DA9052_LDO(DA9052_LDO9_VOLT_UPPER, + DA9052_LDO9_VOLT_LOWER, "DA9052_LDO9", 2500), + DA9052_LDO(DA9052_LDO567810_VOLT_UPPER, + DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO10", 1200), +}; + +#define MX53_LOCO_DA9052_IRQ (6*32 + 11) /* GPIO7_11 */ + +static int __init loco_da9052_init(struct da9052 *da9052) +{ + /* Configuring for DA9052 interrupt servce */ + /* s3c_gpio_setpull(DA9052_IRQ_PIN, S3C_GPIO_PULL_UP); */ + + /* Set interrupt as LOW LEVEL interrupt source */ + irq_set_irq_type(gpio_to_irq(MX53_LOCO_DA9052_IRQ), + IRQF_TRIGGER_LOW); + return 0; +} + +static struct da9052_pdata __initdata da9052_plat = { + .init = loco_da9052_init, + .irq_base = MXC_PMIC_IRQ_START, + .regulators = { + &da9052_regulators_init[0], + &da9052_regulators_init[1], + &da9052_regulators_init[2], + &da9052_regulators_init[3], + &da9052_regulators_init[4], + &da9052_regulators_init[5], + &da9052_regulators_init[6], + &da9052_regulators_init[7], + &da9052_regulators_init[8], + &da9052_regulators_init[9], + &da9052_regulators_init[10], + &da9052_regulators_init[11], + &da9052_regulators_init[12], + &da9052_regulators_init[13], + }, +}; + static inline void mx53_loco_fec_reset(void) { int ret; @@ -273,6 +397,10 @@ static struct i2c_board_info mx53loco_i2c_devices[] = { { I2C_BOARD_INFO("mma8450", 0x1C), }, + { + I2C_BOARD_INFO("da9053-aa", 0x90 >> 1), + .platform_data = &da9052_plat, + }, }; static void __init mx53_loco_board_init(void) diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index fd9efb0..9fb56eb 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -53,7 +53,15 @@ #endif /* REVISIT: Add IPU irqs on IMX51 */ -#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) +#define MXC_PMIC_IRQ_START (MXC_IPU_IRQ_START + MX3_IPU_IRQS) + +#ifdef CONFIG_MACH_MX53_LOCO +#define MXC_PMIC_IRQS 32 +#else +#define MXC_PMIC_IRQS 0 +#endif + +#define NR_IRQS (MXC_PMIC_IRQ_START + MXC_PMIC_IRQS) extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);