From patchwork Fri Dec 16 16:35:31 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 5825 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2A26D23E01 for ; Fri, 16 Dec 2011 16:35:51 +0000 (UTC) Received: from mail-ee0-f52.google.com (mail-ee0-f52.google.com [74.125.83.52]) by fiordland.canonical.com (Postfix) with ESMTP id 212FFA184FD for ; Fri, 16 Dec 2011 16:35:51 +0000 (UTC) Received: by eeke52 with SMTP id e52so3773516eek.11 for ; Fri, 16 Dec 2011 08:35:51 -0800 (PST) Received: by 10.204.131.74 with SMTP id w10mr3247826bks.36.1324053350883; Fri, 16 Dec 2011 08:35:50 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.41.207 with SMTP id p15cs10390bke; Fri, 16 Dec 2011 08:35:50 -0800 (PST) Received: by 10.180.105.232 with SMTP id gp8mr13357559wib.65.1324053347106; Fri, 16 Dec 2011 08:35:47 -0800 (PST) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id e1si6414778wbh.82.2011.12.16.08.35.46 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 16 Dec 2011 08:35:47 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by wgbdr11 with SMTP id dr11so6380840wgb.31 for ; Fri, 16 Dec 2011 08:35:46 -0800 (PST) Received: by 10.227.209.66 with SMTP id gf2mr6075185wbb.20.1324053346855; Fri, 16 Dec 2011 08:35:46 -0800 (PST) Received: from e103592.peterhouse.linaro.org (fw-lnat.cambridge.arm.com. [217.140.96.63]) by mx.google.com with ESMTPS id p2sm15137647wbh.22.2011.12.16.08.35.45 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 08:35:46 -0800 (PST) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Rob Herring Subject: [PATCH v5 REPOST 4/5] highbank: Unconditionally require l2x0 L2 cache controller support Date: Fri, 16 Dec 2011 16:35:31 +0000 Message-Id: <1324053332-6431-5-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1324053332-6431-1-git-send-email-dave.martin@linaro.org> References: <1324053332-6431-1-git-send-email-dave.martin@linaro.org> If running in the Normal World on a TrustZone-enabled SoC, Linux does not have complete control over the L2 cache controller configuration. The kernel cannot work reliably on such platforms without the l2x0 cache support code built in. This patch unconditionally enables l2x0 support for the Highbank SoC. Thanks to Rob Herring for this suggestion. [1] [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074495.html Signed-off-by: Dave Martin Acked-by: Rob Herring --- arch/arm/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index eca82f9..1792146 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -340,12 +340,12 @@ config ARCH_HIGHBANK select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 + select CACHE_L2X0 select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 select USE_OF help Support for the Calxeda Highbank SoC based boards.