From patchwork Tue Dec 13 06:25:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhao X-Patchwork-Id: 5621 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 22DCC23E0E for ; Tue, 13 Dec 2011 06:26:07 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 13FF0A18293 for ; Tue, 13 Dec 2011 06:26:07 +0000 (UTC) Received: by mail-bw0-f52.google.com with SMTP id 17so8656841bke.11 for ; Mon, 12 Dec 2011 22:26:07 -0800 (PST) Received: by 10.204.152.138 with SMTP id g10mr9776621bkw.36.1323757566916; Mon, 12 Dec 2011 22:26:06 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.129.2 with SMTP id hg2cs70756bkc; Mon, 12 Dec 2011 22:26:06 -0800 (PST) Received: by 10.224.1.136 with SMTP id 8mr1094847qaf.54.1323757565022; Mon, 12 Dec 2011 22:26:05 -0800 (PST) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe006.messaging.microsoft.com. [216.32.181.186]) by mx.google.com with ESMTPS id j7si6892462qcv.92.2011.12.12.22.26.04 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 12 Dec 2011 22:26:05 -0800 (PST) Received-SPF: neutral (google.com: 216.32.181.186 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) client-ip=216.32.181.186; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.181.186 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) smtp.mail=richard.zhao@linaro.org Received: from mail4-ch1-R.bigfish.com (10.43.68.243) by CH1EHSOBE018.bigfish.com (10.43.70.68) with Microsoft SMTP Server id 14.1.225.23; Tue, 13 Dec 2011 06:26:00 +0000 Received: from mail4-ch1 (localhost [127.0.0.1]) by mail4-ch1-R.bigfish.com (Postfix) with ESMTP id E26351C0368; Tue, 13 Dec 2011 06:26:00 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275dhz2dh87h2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 13, X-FB-DOMAIN-IP-MATCH: fail Received: from mail4-ch1 (localhost.localdomain [127.0.0.1]) by mail4-ch1 (MessageSwitch) id 1323757560703077_21296; Tue, 13 Dec 2011 06:26:00 +0000 (UTC) Received: from CH1EHSMHS023.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.241]) by mail4-ch1.bigfish.com (Postfix) with ESMTP id A80816A003F; Tue, 13 Dec 2011 06:26:00 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS023.bigfish.com (10.43.70.23) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 13 Dec 2011 06:26:00 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.355.3; Tue, 13 Dec 2011 00:26:02 -0600 Received: from b20223-02.ap.freescale.net (b20223-02.ap.freescale.net [10.192.242.124]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id pBD6PjON010279; Tue, 13 Dec 2011 00:25:59 -0600 (CST) From: Richard Zhao To: CC: , , , , , Subject: [PATCH V2 5/7] arm/imx: add cpu_voltage to cpu_op Date: Tue, 13 Dec 2011 14:25:28 +0800 Message-ID: <1323757530-19402-6-git-send-email-richard.zhao@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323757530-19402-1-git-send-email-richard.zhao@linaro.org> References: <1323757530-19402-1-git-send-email-richard.zhao@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Help cpu_op table have cpu_voltage info and cpufreq driver to change cpu voltage. Signed-off-by: Richard Zhao --- arch/arm/plat-mxc/include/mach/mxc.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index a4d36d6..1ff7fe7 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -166,6 +166,7 @@ extern unsigned int __mxc_cpu_type; struct cpu_op { u32 cpu_rate; + int cpu_voltage; }; int tzic_enable_wake(int is_idle);