From patchwork Mon Dec 12 09:57:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 5589 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 86FFA23E18 for ; Mon, 12 Dec 2011 09:57:56 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 75D5FA18623 for ; Mon, 12 Dec 2011 09:57:56 +0000 (UTC) Received: by bke17 with SMTP id 17so6970166bke.11 for ; Mon, 12 Dec 2011 01:57:56 -0800 (PST) Received: by 10.204.156.208 with SMTP id y16mr9415482bkw.72.1323683876101; Mon, 12 Dec 2011 01:57:56 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.129.2 with SMTP id hg2cs42860bkc; Mon, 12 Dec 2011 01:57:55 -0800 (PST) Received: by 10.213.9.148 with SMTP id l20mr2918358ebl.44.1323683874687; Mon, 12 Dec 2011 01:57:54 -0800 (PST) Received: from eu1sys200aog105.obsmtp.com (eu1sys200aog105.obsmtp.com. [207.126.144.119]) by mx.google.com with SMTP id a59si8845882eeb.130.2011.12.12.01.57.47 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 12 Dec 2011 01:57:54 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.119 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.119; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.119 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob105.postini.com ([207.126.147.11]) with SMTP ID DSNKTuXQFLHrLyD4MJ0YbbPzmf/3ao58jAqZ@postini.com; Mon, 12 Dec 2011 09:57:54 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id B44446F; Mon, 12 Dec 2011 09:49:11 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 3F6DDD4A; Mon, 12 Dec 2011 09:57:37 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 1587024C2F2; Mon, 12 Dec 2011 10:57:31 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 12 Dec 2011 10:57:35 +0100 From: Linus Walleij To: Russell King , Cc: Colin Cross , Thomas Gleixner , Rob Herring , Santosh Shilimkar , Linus Walleij , Russell King Subject: [PATCH 3/4] ARM: smp_twd: get the rate from a clock Date: Mon, 12 Dec 2011 10:57:27 +0100 Message-ID: <1323683847-23902-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij This break-out from Colin Cross' cpufreq-aware TWD patch will optionally retrieve the clock rate of the TWD from an external clock. A variant of this patch has been proposed by Rob Herring as well. The basic idea is to avoid recalibrating the rate of the clock at boot if the platform already know what rate the clock to the TWD block has. Signed-off-by: Colin Cross Cc: Russell King Acked-by: Thomas Gleixner Acked-by: Rob Herring Acked-by: Santosh Shilimkar [Broke out of larger SMP TWD patch] Signed-off-by: Linus Walleij --- arch/arm/kernel/smp_twd.c | 32 +++++++++++++++++++++++++++++++- 1 files changed, 31 insertions(+), 1 deletions(-) diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 20cce4e..a13e1c0 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -10,8 +10,10 @@ */ #include #include +#include #include #include +#include #include #include #include @@ -26,6 +28,7 @@ /* set up by the platform code */ void __iomem *twd_base; +static struct clk *twd_clk; static unsigned long twd_timer_rate; static DEFINE_PER_CPU(struct clock_event_device *, twd_ce); @@ -142,6 +145,27 @@ static irqreturn_t twd_handler(int irq, void *dev_id) return IRQ_NONE; } +static struct clk *twd_get_clock(void) +{ + struct clk *clk; + int err; + + clk = clk_get_sys("smp_twd", NULL); + if (IS_ERR(clk)) { + pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk)); + return clk; + } + + err = clk_enable(clk); + if (err) { + pr_err("smp_twd: clock failed to enable: %d\n", err); + clk_put(clk); + return ERR_PTR(err); + } + + return clk; +} + /* * Setup the local clock events for a CPU. */ @@ -167,7 +191,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) } } - twd_calibrate_rate(); + if (!twd_clk) + twd_clk = twd_get_clock(); + + if (!IS_ERR_OR_NULL(twd_clk)) + twd_timer_rate = clk_get_rate(twd_clk); + else + twd_calibrate_rate(); clk->name = "local_timer"; clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |