From patchwork Wed Nov 30 11:12:04 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 5397 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 008AE23E19 for ; Wed, 30 Nov 2011 11:12:13 +0000 (UTC) Received: from mail-lpp01m010-f52.google.com (mail-lpp01m010-f52.google.com [209.85.215.52]) by fiordland.canonical.com (Postfix) with ESMTP id C9073A18155 for ; Wed, 30 Nov 2011 11:12:13 +0000 (UTC) Received: by laah2 with SMTP id h2so211613laa.11 for ; Wed, 30 Nov 2011 03:12:13 -0800 (PST) Received: by 10.152.111.170 with SMTP id ij10mr990095lab.5.1322651533479; Wed, 30 Nov 2011 03:12:13 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs8070lal; Wed, 30 Nov 2011 03:12:13 -0800 (PST) Received: by 10.216.207.65 with SMTP id m43mr203975weo.103.1322651531623; Wed, 30 Nov 2011 03:12:11 -0800 (PST) Received: from mail-ee0-f50.google.com (mail-ee0-f50.google.com [74.125.83.50]) by mx.google.com with ESMTPS id ez9si540123wbb.69.2011.11.30.03.12.11 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 30 Nov 2011 03:12:11 -0800 (PST) Received-SPF: neutral (google.com: 74.125.83.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=74.125.83.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.83.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by eekd4 with SMTP id d4so297238eek.37 for ; Wed, 30 Nov 2011 03:12:11 -0800 (PST) Received: by 10.14.8.143 with SMTP id 15mr228926eer.56.1322651530919; Wed, 30 Nov 2011 03:12:10 -0800 (PST) Received: from e103592.peterhouse.linaro.org (fw-lnat.cambridge.arm.com. [217.140.96.63]) by mx.google.com with ESMTPS id z58sm5122481eea.3.2011.11.30.03.12.09 (version=SSLv3 cipher=OTHER); Wed, 30 Nov 2011 03:12:10 -0800 (PST) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Will Deacon , Catalin Marinas Subject: [PATCH v2] ARM: errata: Remove SMP dependency for erratum 751472 Date: Wed, 30 Nov 2011 11:12:04 +0000 Message-Id: <1322651524-24095-1-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 Activation conditions for a workaround should not be encoded in the workaround's direct dependencies if this makes otherwise reasonable configuration choices impossible. This patches uses the SMP/UP patching facilities instead to compile out the workaround if the configuration means that it is definitely not needed. This means that configs for buggy silicon can simply select ARM_ERRATA_751472, without preventing a UP kernel from being built or duplicatiing knowledge about when to activate the workaround. This seems the correct why to do things, because the erratum is a property of the silicon, irrespective of what the kernel config happens to be. Signed-off-by: Dave Martin --- Changes since v1: v2: Fix incorrect use of ALT_SMP()/ALT_UP_B(): they must be used in the correct order, otherwise the fixup will reference the wrong ALT_SMP() block and get applied in the wrong place. Make the whole erratum workaround #ifdef CONFIG_SMP so that we don't leave some dead code and an unnecessary branch in the image when building a uniprocessor kernel. arch/arm/Kconfig | 2 +- arch/arm/mm/proc-v7.S | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 44789ef..e5bbb2f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1281,7 +1281,7 @@ config ARM_ERRATA_743622 config ARM_ERRATA_751472 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" - depends on CPU_V7 && SMP + depends on CPU_V7 help This option enables the workaround for the 751472 Cortex-A9 (prior to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 2c559ac..e70a737 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -363,11 +363,13 @@ __v7_setup: orreq r10, r10, #1 << 6 @ set bit #6 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register #endif -#ifdef CONFIG_ARM_ERRATA_751472 - cmp r6, #0x30 @ present prior to r3p0 +#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP) + ALT_SMP(cmp r6, #0x30) @ present prior to r3p0 + ALT_UP_B(1f) mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register orrlt r10, r10, #1 << 11 @ set bit #11 mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register +1: #endif 3: mov r10, #0