From patchwork Fri Nov 11 10:50:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhao X-Patchwork-Id: 5063 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 1F9FE23E0F for ; Fri, 11 Nov 2011 10:51:02 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 0C0E1A183DE for ; Fri, 11 Nov 2011 10:51:02 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id n26so5533536faa.11 for ; Fri, 11 Nov 2011 02:51:02 -0800 (PST) Received: by 10.152.135.166 with SMTP id pt6mr6511056lab.26.1321008661861; Fri, 11 Nov 2011 02:51:01 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.40.7 with SMTP id t7cs43122lak; Fri, 11 Nov 2011 02:51:01 -0800 (PST) Received: by 10.52.30.194 with SMTP id u2mr19921159vdh.13.1321008659442; Fri, 11 Nov 2011 02:50:59 -0800 (PST) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe005.messaging.microsoft.com. [216.32.181.185]) by mx.google.com with ESMTPS id n2si2573835vcw.116.2011.11.11.02.50.58 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 11 Nov 2011 02:50:59 -0800 (PST) Received-SPF: neutral (google.com: 216.32.181.185 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) client-ip=216.32.181.185; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.181.185 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) smtp.mail=richard.zhao@linaro.org Received: from mail187-ch1-R.bigfish.com (10.43.68.241) by CH1EHSOBE010.bigfish.com (10.43.70.60) with Microsoft SMTP Server id 14.1.225.22; Fri, 11 Nov 2011 10:50:32 +0000 Received: from mail187-ch1 (localhost.localdomain [127.0.0.1]) by mail187-ch1-R.bigfish.com (Postfix) with ESMTP id 066EA53049A; Fri, 11 Nov 2011 10:50:48 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275dhz2dh87h2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 13, X-FB-DOMAIN-IP-MATCH: fail Received: from mail187-ch1 (localhost.localdomain [127.0.0.1]) by mail187-ch1 (MessageSwitch) id 1321008647753387_6679; Fri, 11 Nov 2011 10:50:47 +0000 (UTC) Received: from CH1EHSMHS015.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.251]) by mail187-ch1.bigfish.com (Postfix) with ESMTP id A3F541728056; Fri, 11 Nov 2011 10:50:47 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS015.bigfish.com (10.43.70.15) with Microsoft SMTP Server (TLS) id 14.1.225.22; Fri, 11 Nov 2011 10:50:59 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.339.2; Fri, 11 Nov 2011 04:50:55 -0600 Received: from b20223-02.ap.freescale.net (b20223-02-010192242124.ap.freescale.net [10.192.242.124]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id pABAoecN000610; Fri, 11 Nov 2011 04:50:52 -0600 (CST) From: Richard Zhao To: , , , , CC: , , , , , , , Richard Zhao Subject: [PATCH V3 03/14] ARM: mxc: ahci: add clk_prepare/clk_unprepare Date: Fri, 11 Nov 2011 18:50:26 +0800 Message-ID: <1321008637-19999-4-git-send-email-richard.zhao@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1321008637-19999-1-git-send-email-richard.zhao@linaro.org> References: <1321008637-19999-1-git-send-email-richard.zhao@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Signed-off-by: Richard Zhao --- arch/arm/plat-mxc/devices/platform-ahci-imx.c | 16 ++++++++-------- 1 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c index d8a56ae..ade4a1c 100644 --- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c +++ b/arch/arm/plat-mxc/devices/platform-ahci-imx.c @@ -60,9 +60,9 @@ static int imx_sata_init(struct device *dev, void __iomem *addr) dev_err(dev, "no sata clock.\n"); return PTR_ERR(sata_clk); } - ret = clk_enable(sata_clk); + ret = clk_prepare_enable(sata_clk); if (ret) { - dev_err(dev, "can't enable sata clock.\n"); + dev_err(dev, "can't prepare/enable sata clock.\n"); goto put_sata_clk; } @@ -73,9 +73,9 @@ static int imx_sata_init(struct device *dev, void __iomem *addr) ret = PTR_ERR(sata_ref_clk); goto release_sata_clk; } - ret = clk_enable(sata_ref_clk); + ret = clk_prepare_enable(sata_ref_clk); if (ret) { - dev_err(dev, "can't enable sata ref clock.\n"); + dev_err(dev, "can't prepare/enable sata ref clock.\n"); goto put_sata_ref_clk; } @@ -104,11 +104,11 @@ static int imx_sata_init(struct device *dev, void __iomem *addr) return 0; release_sata_ref_clk: - clk_disable(sata_ref_clk); + clk_disable_unprepare(sata_ref_clk); put_sata_ref_clk: clk_put(sata_ref_clk); release_sata_clk: - clk_disable(sata_clk); + clk_disable_unprepare(sata_clk); put_sata_clk: clk_put(sata_clk); @@ -117,10 +117,10 @@ put_sata_clk: static void imx_sata_exit(struct device *dev) { - clk_disable(sata_ref_clk); + clk_disable_unprepare(sata_ref_clk); clk_put(sata_ref_clk); - clk_disable(sata_clk); + clk_disable_unprepare(sata_clk); clk_put(sata_clk); }