From patchwork Thu Nov 10 04:54:07 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhao X-Patchwork-Id: 5011 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 88DB223E51 for ; Thu, 10 Nov 2011 04:54:50 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 7CBAEA181F8 for ; Thu, 10 Nov 2011 04:54:50 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id n26so3473983faa.11 for ; Wed, 09 Nov 2011 20:54:50 -0800 (PST) Received: by 10.152.112.10 with SMTP id im10mr3536295lab.2.1320900890249; Wed, 09 Nov 2011 20:54:50 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.3.196 with SMTP id e4cs8548lae; Wed, 9 Nov 2011 20:54:50 -0800 (PST) Received: by 10.52.30.194 with SMTP id u2mr10038571vdh.13.1320900886207; Wed, 09 Nov 2011 20:54:46 -0800 (PST) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe001.messaging.microsoft.com. [216.32.181.181]) by mx.google.com with ESMTPS id c9si1659798vce.115.2011.11.09.20.54.45 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 09 Nov 2011 20:54:46 -0800 (PST) Received-SPF: neutral (google.com: 216.32.181.181 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) client-ip=216.32.181.181; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.181.181 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) smtp.mail=richard.zhao@linaro.org Received: from mail222-ch1-R.bigfish.com (10.43.68.249) by CH1EHSOBE014.bigfish.com (10.43.70.64) with Microsoft SMTP Server id 14.1.225.22; Thu, 10 Nov 2011 04:54:21 +0000 Received: from mail222-ch1 (localhost.localdomain [127.0.0.1]) by mail222-ch1-R.bigfish.com (Postfix) with ESMTP id BC8E4880E9; Thu, 10 Nov 2011 04:54:34 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275dhz2dh87h2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail222-ch1 (localhost.localdomain [127.0.0.1]) by mail222-ch1 (MessageSwitch) id 1320900872502976_23187; Thu, 10 Nov 2011 04:54:32 +0000 (UTC) Received: from CH1EHSMHS025.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.244]) by mail222-ch1.bigfish.com (Postfix) with ESMTP id 6A68F111804C; Thu, 10 Nov 2011 04:54:32 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS025.bigfish.com (10.43.70.25) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 10 Nov 2011 04:54:18 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server id 14.1.339.2; Wed, 9 Nov 2011 22:54:42 -0600 Received: from b20223-02.ap.freescale.net (b20223-02.ap.freescale.net [10.192.242.124]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id pAA4sZAd016053; Wed, 9 Nov 2011 22:54:39 -0600 (CST) From: Richard Zhao To: CC: , , , , , , , Richard Zhao Subject: [PATCH 2/9] ARM: mxc: ahci: convert to clk_prepare/clk_unprepare Date: Thu, 10 Nov 2011 12:54:07 +0800 Message-ID: <1320900854-13031-2-git-send-email-richard.zhao@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1320900854-13031-1-git-send-email-richard.zhao@linaro.org> References: <1320900854-13031-1-git-send-email-richard.zhao@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Signed-off-by: Richard Zhao --- arch/arm/plat-mxc/devices/platform-ahci-imx.c | 20 ++++++++++++++++++-- 1 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c index d8a56ae..7bf3360 100644 --- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c +++ b/arch/arm/plat-mxc/devices/platform-ahci-imx.c @@ -60,10 +60,15 @@ static int imx_sata_init(struct device *dev, void __iomem *addr) dev_err(dev, "no sata clock.\n"); return PTR_ERR(sata_clk); } + ret = clk_prepare(sata_clk); + if (ret) { + dev_err(dev, "can't prepare sata clock.\n"); + goto put_sata_clk; + } ret = clk_enable(sata_clk); if (ret) { dev_err(dev, "can't enable sata clock.\n"); - goto put_sata_clk; + goto unprepare_sata_clk; } /* Get the AHCI SATA PHY CLK */ @@ -73,10 +78,15 @@ static int imx_sata_init(struct device *dev, void __iomem *addr) ret = PTR_ERR(sata_ref_clk); goto release_sata_clk; } + ret = clk_prepare(sata_ref_clk); + if (ret) { + dev_err(dev, "can't prepare sata ref clock.\n"); + goto put_sata_ref_clk; + } ret = clk_enable(sata_ref_clk); if (ret) { dev_err(dev, "can't enable sata ref clock.\n"); - goto put_sata_ref_clk; + goto unprepare_sata_ref_clk; } /* Get the AHB clock rate, and configure the TIMER1MS reg later */ @@ -105,10 +115,14 @@ static int imx_sata_init(struct device *dev, void __iomem *addr) release_sata_ref_clk: clk_disable(sata_ref_clk); +unprepare_sata_ref_clk: + clk_unprepare(sata_ref_clk); put_sata_ref_clk: clk_put(sata_ref_clk); release_sata_clk: clk_disable(sata_clk); +unprepare_sata_clk: + clk_unprepare(sata_clk); put_sata_clk: clk_put(sata_clk); @@ -118,9 +132,11 @@ put_sata_clk: static void imx_sata_exit(struct device *dev) { clk_disable(sata_ref_clk); + clk_unprepare(sata_ref_clk); clk_put(sata_ref_clk); clk_disable(sata_clk); + clk_unprepare(sata_clk); clk_put(sata_clk); }