From patchwork Fri Sep 16 17:27:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob X-Patchwork-Id: 4143 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 619E623EF5 for ; Fri, 16 Sep 2011 17:28:02 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 56622A18612 for ; Fri, 16 Sep 2011 17:28:02 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id 23so2714505fxe.11 for ; Fri, 16 Sep 2011 10:28:02 -0700 (PDT) Received: by 10.223.63.8 with SMTP id z8mr180945fah.84.1316194082202; Fri, 16 Sep 2011 10:28:02 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.11.8 with SMTP id m8cs135676lab; Fri, 16 Sep 2011 10:28:01 -0700 (PDT) Received: by 10.236.185.4 with SMTP id t4mr16686859yhm.121.1316194078733; Fri, 16 Sep 2011 10:27:58 -0700 (PDT) Received: from mail-yi0-f50.google.com (mail-yi0-f50.google.com [209.85.218.50]) by mx.google.com with ESMTPS id c9si5095344anb.203.2011.09.16.10.27.58 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 16 Sep 2011 10:27:58 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.218.50 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) client-ip=209.85.218.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.218.50 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) smtp.mail=rob.lee@linaro.org Received: by yib25 with SMTP id 25so5329384yib.37 for ; Fri, 16 Sep 2011 10:27:58 -0700 (PDT) Received: by 10.236.165.99 with SMTP id d63mr16473451yhl.86.1316194077966; Fri, 16 Sep 2011 10:27:57 -0700 (PDT) Received: from b18647-20 ([64.31.34.21]) by mx.google.com with ESMTPS id k12sm24715473anc.19.2011.09.16.10.27.56 (version=SSLv3 cipher=OTHER); Fri, 16 Sep 2011 10:27:57 -0700 (PDT) From: Robert Lee To: linux-arm-kernel@lists.infradead.org, s.hauer@pengutronix.de Cc: patches@linaro.org, amit.kucheria@linaro.org, Shawn.Guo@freescale.com, Hui.Liu@freescale.com Subject: [PATCH v2 3/3] ARM: imx: Add cpuidle for i.MX51 Date: Fri, 16 Sep 2011 12:27:50 -0500 Message-Id: <1316194070-21889-4-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1316194070-21889-1-git-send-email-rob.lee@linaro.org> References: <1316194070-21889-1-git-send-email-rob.lee@linaro.org> Add the i.MX51 SoC specific cpuidle operating point data and other necessary data. Add init call to fill in imx cpuidle driver data structures. Signed-off-by: Robert Lee --- arch/arm/mach-mx5/Makefile | 3 +-- arch/arm/mach-mx5/cpu_op-mx51.c | 35 ++++++++++++++++++++++++++++++++++- arch/arm/mach-mx5/cpu_op-mx51.h | 1 + arch/arm/mach-mx5/mm.c | 4 ++++ 4 files changed, 40 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 383e7cd..dc5413b 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -5,9 +5,8 @@ # Object file lists. obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o obj-$(CONFIG_SOC_IMX50) += mm-mx50.o - +obj-$(CONFIG_SOC_IMX51) += cpu_op-mx51.o obj-$(CONFIG_PM) += pm-imx5.o -obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o diff --git a/arch/arm/mach-mx5/cpu_op-mx51.c b/arch/arm/mach-mx5/cpu_op-mx51.c index 9d34c3d..d85ced3 100644 --- a/arch/arm/mach-mx5/cpu_op-mx51.c +++ b/arch/arm/mach-mx5/cpu_op-mx51.c @@ -12,9 +12,12 @@ */ #include -#include #include +#include +#include +#include +#ifdef CONFIG_CPU_FREQ_IMX static struct cpu_op mx51_cpu_op[] = { { .cpu_rate = 160000000,}, @@ -27,3 +30,33 @@ struct cpu_op *mx51_get_cpu_op(int *op) *op = ARRAY_SIZE(mx51_cpu_op); return mx51_cpu_op; } +#endif /* CONFIG_CPU_FREQ_IMX */ + +#ifdef CONFIG_CPU_IDLE +static struct imx_cpuidle_state_data mx51_cpuidle_state_data[] __initdata = { + { + .name = "powered_noclock", + .desc = "idle cpu powered, unclocked.", + .exit_latency = 12, + .mach_cpu_pwr_state = WAIT_UNCLOCKED, + }, { + .name = "nopower_noclock", + .desc = "idle cpu unpowered, unclocked.", + .exit_latency = 20, + .mach_cpu_pwr_state = WAIT_UNCLOCKED_POWER_OFF, + } +}; + +static struct cpuidle_driver imx51_cpuidle_driver = { + .name = "imx51_cpuidle", + .owner = THIS_MODULE, +}; + +struct imx_cpuidle_data mx51_cpuidle_data __initdata = { + .imx_cpuidle_driver = &imx51_cpuidle_driver, + .state_data = mx51_cpuidle_state_data, + .mach_cpuidle = mx5_cpuidle, + .mach_cpuidle_init = mx5_cpuidle_init, + .num_states = ARRAY_SIZE(mx51_cpuidle_state_data), +}; +#endif /* CONFIG_CPU_IDLE */ diff --git a/arch/arm/mach-mx5/cpu_op-mx51.h b/arch/arm/mach-mx5/cpu_op-mx51.h index 97477fe..60c60fd 100644 --- a/arch/arm/mach-mx5/cpu_op-mx51.h +++ b/arch/arm/mach-mx5/cpu_op-mx51.h @@ -12,3 +12,4 @@ */ extern struct cpu_op *mx51_get_cpu_op(int *op); +extern struct imx_cpuidle_data mx51_cpuidle_data; diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index baea6e5..d20827e 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include "cpu_op-mx51.h" /* * Define the MX51 memory map. @@ -148,6 +150,8 @@ void __init imx51_soc_init(void) /* i.mx51 has the i.mx35 type sdma */ imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); + + imx_cpuidle_init(&mx51_cpuidle_data); } void __init imx53_soc_init(void)