From patchwork Thu Sep 8 03:27:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Hui X-Patchwork-Id: 3971 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id DF88E23EFD for ; Thu, 8 Sep 2011 03:22:05 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id D4A27A1806B for ; Thu, 8 Sep 2011 03:22:05 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id 18so1701666fxd.11 for ; Wed, 07 Sep 2011 20:22:05 -0700 (PDT) Received: by 10.223.62.8 with SMTP id v8mr325858fah.43.1315452125416; Wed, 07 Sep 2011 20:22:05 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.11.8 with SMTP id m8cs160446lab; Wed, 7 Sep 2011 20:22:05 -0700 (PDT) Received: by 10.52.184.168 with SMTP id ev8mr160738vdc.291.1315452124485; Wed, 07 Sep 2011 20:22:04 -0700 (PDT) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe006.messaging.microsoft.com [216.32.181.186]) by mx.google.com with ESMTPS id bz6si2068844vdc.22.2011.09.07.20.22.02 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 07 Sep 2011 20:22:03 -0700 (PDT) Received-SPF: neutral (google.com: 216.32.181.186 is neither permitted nor denied by best guess record for domain of jason.hui@linaro.org) client-ip=216.32.181.186; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.181.186 is neither permitted nor denied by best guess record for domain of jason.hui@linaro.org) smtp.mail=jason.hui@linaro.org Received: from mail91-ch1-R.bigfish.com (216.32.181.170) by CH1EHSOBE016.bigfish.com (10.43.70.66) with Microsoft SMTP Server id 14.1.225.22; Thu, 8 Sep 2011 03:22:02 +0000 Received: from mail91-ch1 (localhost.localdomain [127.0.0.1]) by mail91-ch1-R.bigfish.com (Postfix) with ESMTP id 2D029F00F9; Thu, 8 Sep 2011 03:22:02 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275dhz2dh87h2a8h668h839h63h) X-Spam-TCS-SCL: 2:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail91-ch1 (localhost.localdomain [127.0.0.1]) by mail91-ch1 (MessageSwitch) id 1315452121803404_12911; Thu, 8 Sep 2011 03:22:01 +0000 (UTC) Received: from CH1EHSMHS013.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.246]) by mail91-ch1.bigfish.com (Postfix) with ESMTP id B50B01870051; Thu, 8 Sep 2011 03:22:01 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS013.bigfish.com (10.43.70.13) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 8 Sep 2011 03:22:00 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.323.7; Wed, 7 Sep 2011 22:21:59 -0500 Received: from r64343-desktop.ap.freescale.net (r64343-desktop.ap.freescale.net [10.192.242.36]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p883LkRQ008200; Wed, 7 Sep 2011 22:21:57 -0500 (CDT) From: Jason Liu To: CC: , , , Subject: [PATCH v3 4/4] ARM: i.MX5/mm: consolidate TZIC map code Date: Thu, 8 Sep 2011 11:27:27 +0800 Message-ID: <1315452447-20205-5-git-send-email-jason.hui@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1315452447-20205-1-git-send-email-jason.hui@linaro.org> References: <1315452447-20205-1-git-send-email-jason.hui@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com We can use static mapping for TZIC to get rid of the duplicated code for ioremap and the error handling of ioremap, which will made code more clean and consistent This patch also removes TZIC mapping for i.mx51 TO1 since there is no support for TO1 now since the following commit: 9ab4650f718a0e1cb8792bab4ef97efca4ac75c2 Signed-off-by: Jason Liu Cc: Sascha Hauer --- v3: remove the TZIC for i.mx51 TO1 since there is no support for TO1 now. v2: Remove the MX51_DEBUG related mapping which is conflict with TZIC. MX51_DEBUG related mapping is dead code, no-one use it. --- arch/arm/mach-mx5/mm.c | 27 ++++----------------------- arch/arm/plat-mxc/include/mach/mx51.h | 3 --- 2 files changed, 4 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index 0ca4c6a..c7125ca 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -25,6 +25,7 @@ * Define the MX51 memory map. */ static struct map_desc mx51_io_desc[] __initdata = { + imx_map_entry(MX51, TZIC, MT_DEVICE), imx_map_entry(MX51, IRAM, MT_DEVICE), imx_map_entry(MX51, AIPS1, MT_DEVICE), imx_map_entry(MX51, SPBA0, MT_DEVICE), @@ -35,6 +36,7 @@ static struct map_desc mx51_io_desc[] __initdata = { * Define the MX53 memory map. */ static struct map_desc mx53_io_desc[] __initdata = { + imx_map_entry(MX53, TZIC, MT_DEVICE), imx_map_entry(MX53, AIPS1, MT_DEVICE), imx_map_entry(MX53, SPBA0, MT_DEVICE), imx_map_entry(MX53, AIPS2, MT_DEVICE), @@ -98,33 +100,12 @@ void __init imx50_init_early(void) void __init mx51_init_irq(void) { - unsigned long tzic_addr; - void __iomem *tzic_virt; - - if (mx51_revision() < IMX_CHIP_REVISION_2_0) - tzic_addr = MX51_TZIC_BASE_ADDR_TO1; - else - tzic_addr = MX51_TZIC_BASE_ADDR; - - tzic_virt = ioremap(tzic_addr, SZ_16K); - if (!tzic_virt) - panic("unable to map TZIC interrupt controller\n"); - - tzic_init_irq(tzic_virt); + tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); } void __init mx53_init_irq(void) { - unsigned long tzic_addr; - void __iomem *tzic_virt; - - tzic_addr = MX53_TZIC_BASE_ADDR; - - tzic_virt = ioremap(tzic_addr, SZ_16K); - if (!tzic_virt) - panic("unable to map TZIC interrupt controller\n"); - - tzic_init_irq(tzic_virt); + tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR)); } void __init mx50_init_irq(void) diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 8da9d7a..ba88550 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -339,7 +339,4 @@ extern int mx51_revision(void); extern void mx51_display_revision(void); #endif -/* tape-out 1 defines */ -#define MX51_TZIC_BASE_ADDR_TO1 0x8fffc000 - #endif /* ifndef __MACH_MX51_H__ */