From patchwork Thu Jun 23 17:50:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 2250 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 02D7023F7C for ; Thu, 23 Jun 2011 17:51:23 +0000 (UTC) Received: from mail-qy0-f180.google.com (mail-qy0-f180.google.com [209.85.216.180]) by fiordland.canonical.com (Postfix) with ESMTP id C9E1BA18644 for ; Thu, 23 Jun 2011 17:51:22 +0000 (UTC) Received: by mail-qy0-f180.google.com with SMTP id 30so1513646qyk.11 for ; Thu, 23 Jun 2011 10:51:22 -0700 (PDT) Received: by 10.229.40.139 with SMTP id k11mr1814313qce.135.1308851482583; Thu, 23 Jun 2011 10:51:22 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.229.230.139 with SMTP id jm11cs25981qcb; Thu, 23 Jun 2011 10:51:22 -0700 (PDT) Received: by 10.227.209.205 with SMTP id gh13mr2212894wbb.47.1308851482013; Thu, 23 Jun 2011 10:51:22 -0700 (PDT) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id ei15si4297322wbb.135.2011.06.23.10.51.21 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 23 Jun 2011 10:51:22 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by mail-ww0-f50.google.com with SMTP id 6so2032380wwe.31 for ; Thu, 23 Jun 2011 10:51:21 -0700 (PDT) Received: by 10.227.2.81 with SMTP id 17mr2283582wbi.15.1308851481592; Thu, 23 Jun 2011 10:51:21 -0700 (PDT) Received: from e200948.peterhouse.linaro.org (fw-lnat.cambridge.arm.com [217.140.96.63]) by mx.google.com with ESMTPS id fi5sm1403937wbb.39.2011.06.23.10.51.20 (version=SSLv3 cipher=OTHER); Thu, 23 Jun 2011 10:51:20 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Eric Miao Subject: [PATCH v3 13/40] Subject: ARM: mm: proc-arm1026: Use the new processor struct macros Date: Thu, 23 Jun 2011 18:50:21 +0100 Message-Id: <1308851448-25139-14-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1308851448-25139-1-git-send-email-dave.martin@linaro.org> References: <1308851448-25139-1-git-send-email-dave.martin@linaro.org> Signed-off-by: Dave Martin --- arch/arm/mm/proc-arm1026.S | 53 +++++-------------------------------------- 1 files changed, 7 insertions(+), 46 deletions(-) diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 4136846..cccb912 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -333,17 +333,8 @@ ENTRY(arm1026_dma_unmap_area) mov pc, lr ENDPROC(arm1026_dma_unmap_area) -ENTRY(arm1026_cache_fns) - .long arm1026_flush_icache_all - .long arm1026_flush_kern_cache_all - .long arm1026_flush_user_cache_all - .long arm1026_flush_user_cache_range - .long arm1026_coherent_kern_range - .long arm1026_coherent_user_range - .long arm1026_flush_kern_dcache_area - .long arm1026_dma_map_area - .long arm1026_dma_unmap_area - .long arm1026_dma_flush_range + @ define struct cpu_cache_fns (see and proc-macros.S) + define_cache_functions arm1026, default=arm1026 .align 5 ENTRY(cpu_arm1026_dcache_clean_area) @@ -436,45 +427,15 @@ arm1026_crval: crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001934 __INITDATA - -/* - * Purpose : Function pointers used to access above functions - all calls - * come through these - */ - .type arm1026_processor_functions, #object -arm1026_processor_functions: - .word v5t_early_abort - .word legacy_pabort - .word cpu_arm1026_proc_init - .word cpu_arm1026_proc_fin - .word cpu_arm1026_reset - .word cpu_arm1026_do_idle - .word cpu_arm1026_dcache_clean_area - .word cpu_arm1026_switch_mm - .word cpu_arm1026_set_pte_ext - .word 0 - .word 0 - .word 0 - .size arm1026_processor_functions, . - arm1026_processor_functions + @ define struct processor (see and proc-macros.S) + define_processor_functions arm1026, dabort=v5t_early_abort, pabort=legacy_pabort .section .rodata - .type cpu_arch_name, #object -cpu_arch_name: - .asciz "armv5tej" - .size cpu_arch_name, . - cpu_arch_name - - .type cpu_elf_name, #object -cpu_elf_name: - .asciz "v5" - .size cpu_elf_name, . - cpu_elf_name + string cpu_arch_name, "armv5tej" + string cpu_elf_name, "v5" .align - - .type cpu_arm1026_name, #object -cpu_arm1026_name: - .asciz "ARM1026EJ-S" - .size cpu_arm1026_name, . - cpu_arm1026_name - + string cpu_arm1026_name, "ARM1026EJ-S" .align .section ".proc.info.init", #alloc, #execinstr