From patchwork Mon Jun 20 13:40:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 2084 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E7F1B23F4D for ; Mon, 20 Jun 2011 13:40:39 +0000 (UTC) Received: from mail-vw0-f52.google.com (mail-vw0-f52.google.com [209.85.212.52]) by fiordland.canonical.com (Postfix) with ESMTP id B85E7A1875E for ; Mon, 20 Jun 2011 13:40:39 +0000 (UTC) Received: by mail-vw0-f52.google.com with SMTP id 16so3501381vws.11 for ; Mon, 20 Jun 2011 06:40:39 -0700 (PDT) Received: by 10.52.112.106 with SMTP id ip10mr3856725vdb.127.1308577239466; Mon, 20 Jun 2011 06:40:39 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.52.183.130 with SMTP id em2cs5210vdc; Mon, 20 Jun 2011 06:40:39 -0700 (PDT) Received: by 10.227.55.7 with SMTP id s7mr3566411wbg.65.1308577238719; Mon, 20 Jun 2011 06:40:38 -0700 (PDT) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id fw18si1786376wbb.68.2011.06.20.06.40.38 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 20 Jun 2011 06:40:38 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by wwe6 with SMTP id 6so1711515wwe.31 for ; Mon, 20 Jun 2011 06:40:38 -0700 (PDT) Received: by 10.227.208.207 with SMTP id gd15mr5060927wbb.93.1308577237611; Mon, 20 Jun 2011 06:40:37 -0700 (PDT) Received: from e200948.peterhouse.linaro.org (fw-lnat.cambridge.arm.com [217.140.96.63]) by mx.google.com with ESMTPS id fr17sm2359178wbb.40.2011.06.20.06.40.36 (version=SSLv3 cipher=OTHER); Mon, 20 Jun 2011 06:40:36 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Nicolas Pitre Subject: [PATCH 1/4] ARM: head: Always Enter the kernel in ARM state Date: Mon, 20 Jun 2011 14:40:26 +0100 Message-Id: <1308577229-23681-2-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1308577229-23681-1-git-send-email-dave.martin@linaro.org> References: <1308577229-23681-1-git-send-email-dave.martin@linaro.org> This makes Image directly bootable; otherwise the kernel is reliant on the zImage decompressor to switch to the correct instruction set. Signed-off-by: Dave Martin --- arch/arm/kernel/head.S | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 278c1b0..742b610 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -71,8 +71,16 @@ * crap here - that's what the boot loader (or in extreme, well justified * circumstances, zImage) is for. */ + .arm + __HEAD ENTRY(stext) + + THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. + THUMB( bx r9 ) @ If this is a Thumb-2 kernel, + THUMB( .thumb ) @ switch to Thumb now. + THUMB(1: ) + setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id