From patchwork Fri Jun 17 09:41:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 2025 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 97902183A1 for ; Fri, 17 Jun 2011 09:42:23 +0000 (UTC) Received: from mail-vw0-f52.google.com (mail-vw0-f52.google.com [209.85.212.52]) by fiordland.canonical.com (Postfix) with ESMTP id 44CCFA1843B for ; Fri, 17 Jun 2011 09:42:23 +0000 (UTC) Received: by vws16 with SMTP id 16so1293927vws.11 for ; Fri, 17 Jun 2011 02:42:22 -0700 (PDT) Received: by 10.52.175.197 with SMTP id cc5mr2726207vdc.287.1308303742568; Fri, 17 Jun 2011 02:42:22 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.52.183.130 with SMTP id em2cs238370vdc; Fri, 17 Jun 2011 02:42:21 -0700 (PDT) Received: by 10.213.21.130 with SMTP id j2mr817024ebb.69.1308303740367; Fri, 17 Jun 2011 02:42:20 -0700 (PDT) Received: from AM1EHSOBE003.bigfish.com (am1ehsobe003.messaging.microsoft.com [213.199.154.206]) by mx.google.com with ESMTPS id q55si6620885eef.36.2011.06.17.02.42.18 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 17 Jun 2011 02:42:19 -0700 (PDT) Received-SPF: neutral (google.com: 213.199.154.206 is neither permitted nor denied by best guess record for domain of richard.zhu@linaro.org) client-ip=213.199.154.206; Authentication-Results: mx.google.com; spf=neutral (google.com: 213.199.154.206 is neither permitted nor denied by best guess record for domain of richard.zhu@linaro.org) smtp.mail=richard.zhu@linaro.org Received: from mail63-am1-R.bigfish.com (10.3.201.254) by AM1EHSOBE003.bigfish.com (10.3.204.23) with Microsoft SMTP Server id 14.1.225.22; Fri, 17 Jun 2011 09:42:18 +0000 Received: from mail63-am1 (localhost.localdomain [127.0.0.1]) by mail63-am1-R.bigfish.com (Postfix) with ESMTP id 35A9D1360321; Fri, 17 Jun 2011 09:42:18 +0000 (UTC) X-SpamScore: -3 X-BigFish: VS-3(zz3b49Kzz1202hzz8275dhz2dh87h2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail63-am1 (localhost.localdomain [127.0.0.1]) by mail63-am1 (MessageSwitch) id 1308303717157802_23067; Fri, 17 Jun 2011 09:41:57 +0000 (UTC) Received: from AM1EHSMHS001.bigfish.com (unknown [10.3.201.241]) by mail63-am1.bigfish.com (Postfix) with ESMTP id AC20CDF8079; Fri, 17 Jun 2011 09:40:50 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS001.bigfish.com (10.3.207.101) with Microsoft SMTP Server (TLS) id 14.1.225.22; Fri, 17 Jun 2011 09:40:49 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.289.8; Fri, 17 Jun 2011 04:40:47 -0500 Received: from x-VirtualBox.ap.freescale.net ([10.192.242.193]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p5H9egf0027780; Fri, 17 Jun 2011 04:40:44 -0500 (CDT) From: Richard Zhu To: CC: , , , , , , Richard Zhu Subject: [V3 PATCH] mmc: Enable the ADMA on esdhc imx driver Date: Fri, 17 Jun 2011 17:41:18 +0800 Message-ID: <1308303678-9338-1-git-send-email-richard.zhu@linaro.org> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Eanble the ADMA2 mode on freescale esdhc imx driver, tested on MX51 and MX53. Only ADMA2 mode is enabled, MX25/35 can't support the ADMA2 mode. So this patch is only used for MX51/53. The ADMA2 mode supported or not can be distinguished by the bit20 of Capability Register(offset 0x40) and bit9-8 of HOST PROTOCOL Register(offset 0x28) in eSDHC module. Signed-off-by: Richard Zhu --- drivers/mmc/host/sdhci-esdhc-imx.c | 43 ++++++++++++++++++++++++++++++++++- 1 files changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index a19967d..6760e08 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -31,6 +31,14 @@ #define SDHCI_VENDOR_SPEC 0xC0 #define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 +/* + * There is INT DMA ERR mis-match between eSDHC and STD SDHC SPEC + * Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design, + * but bit28 is used as the INT DMA ERR in fsl eSDHC design. + * Define this macro DMA error INT for fsl eSDHC + */ +#define SDHCI_INT_VENDOR_SPEC_DMA_ERR 0x10000000 + #define ESDHC_FLAG_GPIO_FOR_CD_WP (1 << 0) /* * The CMDTYPE of the CMD register (offset 0xE) should be set to @@ -62,6 +70,7 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct pltfm_imx_data *imx_data = pltfm_host->priv; + u32 dma_mode; /* fake CARD_PRESENT flag on mx25/35 */ u32 val = readl(host->ioaddr + reg); @@ -80,6 +89,28 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg) val |= SDHCI_CARD_PRESENT; } + if (unlikely(reg == SDHCI_CAPABILITIES)) { + /* Only bit20 is used to indicate the ADMA capability of esdhc, + * but bit20 is messed up on some SOCs, make a double check + * on the DMA mode. + */ + dma_mode = readl(host->ioaddr + SDHCI_HOST_CONTROL) >> 5; + dma_mode &= SDHCI_CTRL_DMA_MASK; + + if ((val & SDHCI_CAN_DO_ADMA1) + && (dma_mode > SDHCI_CTRL_ADMA1)) { + val &= ~SDHCI_CAN_DO_ADMA1; + val |= SDHCI_CAN_DO_ADMA2; + } + } + + if (unlikely(reg == SDHCI_INT_STATUS)) { + if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) { + val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR; + val |= SDHCI_INT_ADMA_ERROR; + } + } + return val; } @@ -105,6 +136,13 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); } + if (unlikely((reg == SDHCI_INT_ENABLE) + || (reg == SDHCI_SIGNAL_ENABLE))) { + if (val & SDHCI_INT_ADMA_ERROR) { + val &= ~SDHCI_INT_ADMA_ERROR; + val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR; + } + } writel(val, host->ioaddr + reg); } @@ -322,9 +360,10 @@ static void esdhc_pltfm_exit(struct sdhci_host *host) } struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = { - .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_ADMA + .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_NO_HISPD_BIT + | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC + | SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC | SDHCI_QUIRK_BROKEN_CARD_DETECTION, - /* ADMA has issues. Might be fixable */ .ops = &sdhci_esdhc_ops, .init = esdhc_pltfm_init, .exit = esdhc_pltfm_exit,