From patchwork Mon Jun 6 05:22:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 1748 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:55:20 -0000 Delivered-To: patches@linaro.org Received: by 10.52.181.10 with SMTP id ds10cs9802vdc; Sun, 5 Jun 2011 22:14:20 -0700 (PDT) Received: by 10.43.132.66 with SMTP id ht2mr8274109icc.339.1307337260008; Sun, 05 Jun 2011 22:14:20 -0700 (PDT) Received: from mail-pz0-f50.google.com (mail-pz0-f50.google.com [209.85.210.50]) by mx.google.com with ESMTPS id i18si12411251ibf.59.2011.06.05.22.14.18 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 05 Jun 2011 22:14:19 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.210.50 is neither permitted nor denied by best guess record for domain of shawn.guo@linaro.org) client-ip=209.85.210.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.210.50 is neither permitted nor denied by best guess record for domain of shawn.guo@linaro.org) smtp.mail=shawn.guo@linaro.org Received: by pzk2 with SMTP id 2so1901322pzk.37 for ; Sun, 05 Jun 2011 22:14:17 -0700 (PDT) Received: by 10.143.26.19 with SMTP id d19mr673428wfj.131.1307337257618; Sun, 05 Jun 2011 22:14:17 -0700 (PDT) Received: from localhost.localdomain ([114.216.154.92]) by mx.google.com with ESMTPS id y2sm3412404pbg.88.2011.06.05.22.13.53 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 05 Jun 2011 22:14:16 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Cc: grant.likely@secretlab.ca, jamie@jamieiles.com, patches@linaro.org, Shawn Guo Subject: [PATCH] gpio/mxc: convert gpio-mxc to use basic_mmio_gpio library Date: Mon, 6 Jun 2011 13:22:41 +0800 Message-Id: <1307337761-10606-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.4.1 The gpio-mxc controller complies with basic_mmio_gpio library. The patch convert the driver to use the library. Signed-off-by: Shawn Guo --- The patch is based on the series below. [PATCH v4 0/2] Move plat-mxc gpio driver into drivers/gpio Thanks Jamie Iles for reminding this work. drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-mxc.c | 83 ++++++++--------------------------------------- 2 files changed, 15 insertions(+), 69 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 5f00b41..d973abd 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -96,6 +96,7 @@ config GPIO_EXYNOS4 config GPIO_MXC def_bool y depends on ARCH_MXC + select GPIO_BASIC_MMIO_CORE config GPIO_PLAT_SAMSUNG bool "Samsung SoCs GPIO library support" diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 844079a..b351952893 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -35,9 +36,8 @@ struct mxc_gpio_port { int irq; int irq_high; int virtual_irq_start; - struct gpio_chip chip; + struct bgpio_chip bgc; u32 both_edges; - spinlock_t lock; }; /* @@ -101,8 +101,6 @@ static void gpio_unmask_irq(struct irq_data *d) _set_gpio_irqenable(port, gpio & 0x1f, 1); } -static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); - static int gpio_set_irq_type(struct irq_data *d, u32 type) { u32 gpio = irq_to_gpio(d->irq); @@ -120,7 +118,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) edge = GPIO_INT_FALL_EDGE; break; case IRQ_TYPE_EDGE_BOTH: - val = mxc_gpio_get(&port->chip, gpio & 31); + val = gpio_get_value(gpio & 31); if (val) { edge = GPIO_INT_LOW_LEV; pr_debug("mxc: set GPIO %d to low trigger\n", gpio); @@ -259,60 +257,6 @@ static struct irq_chip gpio_irq_chip = { .irq_set_wake = gpio_set_wake_irq, }; -static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, - int dir) -{ - struct mxc_gpio_port *port = - container_of(chip, struct mxc_gpio_port, chip); - u32 l; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - l = readl(port->base + GPIO_GDIR); - if (dir) - l |= 1 << offset; - else - l &= ~(1 << offset); - writel(l, port->base + GPIO_GDIR); - spin_unlock_irqrestore(&port->lock, flags); -} - -static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -{ - struct mxc_gpio_port *port = - container_of(chip, struct mxc_gpio_port, chip); - void __iomem *reg = port->base + GPIO_DR; - u32 l; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - l = (readl(reg) & (~(1 << offset))) | (!!value << offset); - writel(l, reg); - spin_unlock_irqrestore(&port->lock, flags); -} - -static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct mxc_gpio_port *port = - container_of(chip, struct mxc_gpio_port, chip); - - return (readl(port->base + GPIO_PSR) >> offset) & 1; -} - -static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -{ - _set_gpio_direction(chip, offset, 0); - return 0; -} - -static int mxc_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - mxc_gpio_set(chip, offset, value); - _set_gpio_direction(chip, offset, 1); - return 0; -} - /* * This lock class tells lockdep that GPIO irqs are in a different * category than their parents, so it won't report false recursion. @@ -385,24 +329,25 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev) } } - /* register gpio chip */ - port->chip.direction_input = mxc_gpio_direction_input; - port->chip.direction_output = mxc_gpio_direction_output; - port->chip.get = mxc_gpio_get; - port->chip.set = mxc_gpio_set; - port->chip.base = pdev->id * 32; - port->chip.ngpio = 32; + err = bgpio_init(&port->bgc, &pdev->dev, 4, + port->base + GPIO_PSR, + port->base + GPIO_DR, NULL, + port->base + GPIO_GDIR, NULL, false); + if (err) + goto out_iounmap; - spin_lock_init(&port->lock); + port->bgc.gc.base = pdev->id * 32; - err = gpiochip_add(&port->chip); + err = gpiochip_add(&port->bgc.gc); if (err) - goto out_iounmap; + goto out_bgpio_remove; list_add_tail(&port->node, &mxc_gpio_ports); return 0; +out_bgpio_remove: + bgpio_remove(&port->bgc); out_iounmap: iounmap(port->base); out_release_mem: